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WM8232 датащи(PDF) 40 Page - Cirrus Logic

номер детали WM8232
подробное описание детали  105MSPS 3-Channel AFE with Sensor
PDF  141 Pages
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производитель  CIRRUS [Cirrus Logic]
домашняя страница  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

WM8232 датащи(HTML) 40 Page - Cirrus Logic

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WM8232
40
Rev 4.6
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
1111 = always high
R12 (0Ch)
3:0
FLAG_S4[3:0]
0000
output dataflag as S4
(valid only LVDS mode)
0000 = always low, 0001 = start flag
0010 = reserved, 0011 = reserved, 0100 = reserved
0101 = channel ID[0], 0110 = channel ID[1],
0111 = reserved, 1000 = reserved
1001 = reserved, 1010 = reserved, 1011 = reserved,
1100 = reserved, 1101 = reserved, 1110 = reserved
1111 = always high
TG MASK TIMING
The WM8232 has a TG clock mask function. M1, M2 and M3 pulses specify the mask period; T1 and
T2 pulses are used for changing the signal polarity during the mask period. C_CK1 and C_CK2 are
applied to the M pulse only; they cannot be applied to the T pulse. C_CK3 and C_CK4 are applied to
M1 and T1; C_CK5 and C_CK6 are applied to M2 and T2. The mask timing is synchronized with
TGCKO rise edge.
N-1
N
CKGO3
(Internal)
VSMP
TGCK
pixcnt
TGCKO
N+1
M-2
N+2
M+1
C_CK3
M+2
M+3
M-1
N+3
k
M2@TGCK
M2@TGCK
O
rise@count N
High@TP2
CKGO3 + M2
T2@TGCK
T2@TGCK
O
Low@TP1
P1
TP1
P2
TP2
M
M-1
fall@count M-1
TP1
TP2
Figure 25 TG Mask Timing
TG CLOCK
APPLIED
“M” PULSE
APPLIED
“T” PULSE
C_CK1
C_CK2
M3
none
C_CK3
C_CK4
M1
T1
C_CK5
C_CK6
M2
T2



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