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WM8232 датащи(PDF) 53 Page - Cirrus Logic

номер детали WM8232
подробное описание детали  105MSPS 3-Channel AFE with Sensor
PDF  141 Pages
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производитель  CIRRUS [Cirrus Logic]
домашняя страница  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

WM8232 датащи(HTML) 53 Page - Cirrus Logic

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WM8232
Rev 4.6
53
CLAMP CONFIGURATION
Clamp configuration is the setting for clamp modes and clamp timing configuration in line clamp mode.
See
“Reset Level Clamping (RLC)” section and “CDS/Non-CDS Processing” section for details of
configuring this register.
TG enabled: This must be enabled when AGC function is used.
Line clamp configuration: Line clamp operation is enabled during CLAMP_RISE ~ CLAMP_FALL
period. Also, the source follower should be set to prevent clamp voltage drop in line clamp mode.
Pixel clamp (Bit clamp) mode: The pixel clamping is enabled during RSMP = high period. This mode
can be used in CDS operation only.
0x04[1]
CLPMD=1
0x05[1] SF_INP
0x05[0] SF_VRLC
Source follower
configuration (*2)
Clamp timing
configuration
0xB9,0xBA CLAMP_RISE
0xBB,0xBC CLAMP_FALL
Clamp configuration
Pixel clamp mode (*3)
Clamp mode
selection
0x04[1]
CLPMD=0
Line length
configuration
TG
enabled
0xA1,0xA2 LLENGTH
0xA0[0] TG_EN
TG mode
selection
Master mode
0xA0[1] TGMD=1
Slave mode
0xA0[1] TGMD=0
TG enabled (*1)
Line clamp configuration
Bit clamp
Line clamp
Figure 42 Clamp Configuration
Notes:
1. This must be set when Line clamp is used.
2. SF_INP and SF_VRLC must be set both when source follower enabled
3. Pixel clamp can be used in CDS operation only.



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