WM8232 datasheet(50/141 Pages) CIRRUS

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WM8232

Rev 4.6

d[15:0]

{d[14:0],

d[15]}

{d[13:0],

d[15:14]}

{d[12:0],

d[15:13]}

{d[0],

d[15:1]}

d[15:0]

{d[14:0],

d[15]}

{d[1:0],

d[15:2]}

1 bit shift per TGSYNC

PGEN (register)

PGMARCH=1

(Marching mode)

TGSYNC (input)

Figure 37 Test Pattern Output Data Formats (Marching mode)

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R20 (14h) PG

config

PGMARCH

pattern generator marching mode enable

0 = controlled by PGPAT

1 = marching pattern

6:5

PGPAT[1:0]

select pattern generator output

00 = fixed value

01 = vertical ramp

10 = horizontal ramp

11 = patch

PGINV

invert pattern generator output

0 = normal

1 = invert

SEL_PGZ

select output of pattern generator (IN3)

0 = normal ouput

1 = output generated digital pattern instead of ADC outputs

SEL_PGY

select output of pattern generator (IN2)

0 = normal ouput

1 = output generated digital pattern instead of ADC outputs

SEL_PGX

select output of pattern generator (IN1)

0 = normal ouput

1 = output generated digital pattern instead of ADC outputs

PGEN

enable pattern generator

0 = disable

1 = enable

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R21 (15h)

PGCODE

LSB

7:0

PGLEVEL[7:0]

0000_0000

parameter of pattern generator

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R22 (16h)

PGCODE

MSB

7:0

PGLEVEL[7:0]

0000_0000

parameter of pattern generator

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R23 (17h) PG

width 1

7:0

PGWIDTH1[7:0]

0000_0000

parameter of pattern generator

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