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SPC56EL70L3 датащи(PDF) 96 Page - STMicroelectronics

номер детали SPC56EL70L3
подробное описание детали  4 KB instruction cache with error detection code
PDF  128 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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SPC56EL70L3 датащи(HTML) 96 Page - STMicroelectronics

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Electrical characteristics
SPC56EL70L3, SPC56EL70L5,PC564L70L3, SPC564L70L5
96/128
DocID023953 Rev 5
considering a worst case (since the time constant in reality would be faster) in which
CP2 is reported in parallel to CP1 (call CP = CP1 + CP2), the two capacitances CP and
CS are in series, and the time constant is
Equation 5
Equation 5
can again be simplified considering only CS as an additional worst
condition. In reality, the transient is faster, but the A/D converter circuitry has been
designed to be robust also in the very worst case: the sampling time TS is always much
longer than the internal time constant:
Equation 6
The charge of CP1 and CP2 is redistributed also on CS, determining a new value of the
voltage VA1 on the capacitance according to Equation 7:
Equation 7
A second charge transfer involves also CF (that is typically bigger than the on-chip
capacitance) through the resistance RL: again considering the worst case in which CP2
and CS were in parallel to CP1 (since the time constant in reality would be faster), the
time constant is:
Equation 8
In this case, the time constant depends on the external circuit: in particular imposing
that the transient is completed well before the end of sampling time TS, a constraints on
RL sizing is obtained:
Equation 9
Of course, RL shall be sized also according to the current limitation constraints, in
combination with RS (source impedance) and RF (filter resistance). Being CF
definitively bigger than CP1, CP2 and CS, then the final voltage VA2 (at the end of the
charge transfer transient) will be much higher than VA1. Equation 10 must be respected
(charge balance assuming now CS already charged at VA1):
1
R
SW
R
AD
+

=
C
P
C
S
C
P
C
S
+
---------------------
1
R
SW
R
AD
+

C
S
T
S
«
V
A1
C
S
C
P1
C
P2
++

V
A
C
P1
C
P2
+

=
2
R
L
C
S
C
P1
C
P2
++

10
2
10 R
L
C
S
C
P1
C
P2
++

=T
S



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