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SPC56EL70L3 датащи(PDF) 57 Page - STMicroelectronics

номер детали SPC56EL70L3
подробное описание детали  4 KB instruction cache with error detection code
PDF  128 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

SPC56EL70L3 датащи(HTML) 57 Page - STMicroelectronics

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SPC56EL70L3, SPC56EL70L5,PC564L70L3, SPC564L70L5
Package pinouts and signal descrip-
127
2.4
Pin muxing
Table 7
defines the pin list and muxing for this device.
Each entry of Table 7 shows all the possible configurations for each pin, via the alternate
functions. The default function assigned to each pin after reset is indicated by ALT0.
Note:
Pins labeled “NC” are to be left unconnected. Any connection to an external circuit or
voltage may cause unpredictable device behavior or damage.
Pins labeled “Reserved” are to be tied to ground. Not doing so may cause unpredictable
device behavior.
6. RESET output shall be considered valid only after the 3.3V supply reaches its stable value.
None of system pins (except RESET) provides an open drain output.
Table 7. Pin muxing
Port
name
PCR
Peripheral
Alternate
output
function
Output
mux sel
Input
functions
Input mux
select
Weak
pull
config
during
reset
Pad
speed(1)
Pin #
SRC
= 1
SRC
= 0
100
pkg
144
pkg
Port A
A[0]
PCR[0]
SIUL
GPIO[0]
ALT0
GPIO[0]
Pull
down
M
S
51
73
eTimer_0
ETC[0]
ALT1
ETC[0]
PSMI[35];
PADSEL=0
DSPI_2
SCK
ALT2
SCK
PSMI[1];
PADSEL=0
SIUL
EIRQ[0]
A[1]
PCR[1]
SIUL
GPIO[1]
ALT0
GPIO[1]
Pull
down
M
S
52
74
eTimer_0
ETC[1]
ALT1
ETC[1]
PSMI[36];
PADSEL=0
DSPI_2
SOUT
ALT2
SIUL
EIRQ[1]
A[2]
PCR[2]
SIUL
GPIO[2]
ALT0
GPIO[2]
Pull
down
M
S
57
84
eTimer_0
ETC[2]
ALT1
ETC[2]
PSMI[37];
PADSEL=0
FlexPWM_0
A[3]
ALT3
A[3]
PSMI[23];
PADSEL=0
DSPI_2
SIN
PSMI[2];
PADSEL=0
MC_RGM
ABS[0]
SIUL
EIRQ[2]



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