MCP39F521 datasheet(12/52 Pages) MICROCHIP

12 / 52 page

MCP39F521

DS20005442A-page 12

 2015 Microchip Technology Inc.

3.5

Analog Power Supply Pin (AVDD)

AVDD is the power supply pin for the analog circuitry

within the MCP39F521.

This pin requires appropriate bypass capacitors and

should be maintained to 2.7V and 3.6V for specified

operation. It is recommended to use 0.1 µF ceramic

capacitors.

3.6

Chip Address Inputs (A0, A1)

The A0 and A1 inputs are used by the MCP39F521 for

multiple device operations. The levels on these inputs

are compared with the corresponding bits in the slave

address. The chip is selected if the compare is true.

Up to four devices may be connected to the same bus

by using different combinations. These inputs must be

connected to VDD or GND and cannot be left floating.

In most applications, the chip address inputs are

hardwired to logic 0 or logic 1. For applications in which

these pins are controlled by a microcontroller or other

programmable device, the chip address pins must be

driven to logic 0 or logic 1 before normal device

operation can proceed.

3.7

I2C Serial Clock (SCL)

This input is used to synchronize the data transfer to

and from the device.

3.8

I2C Serial Data (SDA)

This is a bidirectional pin used to transfer addresses

and data into and out of the device. It is an open drain

terminal. Therefore, the SDA bus requires a pull-up

resistor to DVDD (typical 10k for 100kHz, 2k for

400kHz).

For normal data transfer, SDA is allowed to change

only during SCL low. Change during SCL high is

reserved for indicating the Start and Stop conditions.

3.9

24-Bit Delta Sigma ADC

Differential Current Channel

Input Pins (I1+/I1-)

I1- and I1+ are the two fully-differential current channel

inputs for the Delta-Sigma ADCs.

The linear and specified region of the channels are

dependent on the PGA gain. This region corresponds

to a differential voltage range of ±600 mVPEAK/GAIN

with VREF =1.2V.

The maximum absolute voltage, with respect to AGND,

for each In+/- input pin is ±1V with no distortion and

±6V with no breaking after continuous voltage.

3.10

24-Bit Delta Sigma ADC

Differential Voltage Channel

Inputs (V1-/V1+)

V1- and V1+ are the two fully-differential voltage

channel inputs for the Delta-Sigma ADCs.

The linear and specified region of the channels are

dependent on the PGA gain. This region corresponds

to a differential voltage range of ±600 mVPEAK/GAIN

with VREF =1.2V.

The maximum absolute voltage, with respect to AGND,

for each VN+/- input pin is ±1V with no distortion and

±2V, with no breaking after continuous voltage.

3.11

Analog Input (AN_IN)

This is the input to the analog-to-digital converter that

can be used for temperature measurement and

compensation.

temperature

compensation

required in the application, it is advised to connect the

low-power active thermistor IC MCP9700A to this pin.

If temperature compensation is not required, this can

be used as a general purpose analog-to-digital

converter input.

3.12

Analog Ground Pin (AGND)

AGND is the ground connection to internal analog

circuitry (ADCs, PGA, voltage reference, POR). If an

analog ground pin is available on the PCB, it is

recommended that this pin be tied to that plane.

3.13

Zero Crossing Detection (ZCD)

This digital output pin is the output of the Zero Crossing

Detection circuit of the IC. The output here will be a

logic output with edges that transition at each zero

crossing of the voltage channel input. For more

information

see

Section 5.13,

Zero

Crossing

Detection (ZCD)

3.14

Noninverting Reference

Input/Internal Reference Output

Pin (REFIN+/OUT)

This pin is the noninverting side of the differential

voltage reference input for the delta sigma ADCs or the

internal voltage reference output.

For optimal performance, bypass capacitances should

be connected between this pin and AGND at all times,

even when the internal voltage reference is used.

However, these capacitors are not mandatory to

ensure proper operation.

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