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MCP39F521 датащи(PDF) 37 Page - Microchip Technology

номер детали MCP39F521
подробное описание детали  I2C Power Monitor with Calculation and Energy Accumulation
PDF  52 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP39F521 датащи(HTML) 37 Page - Microchip Technology

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 2015 Microchip Technology Inc.
DS20005442A-page 37
MCP39F521
bit 8
VSAG_CL:
Reset or clear bit for the Voltage Sag event
1
= Event is cleared
0
= Event is not cleared (Default)
bit 7
VSUR_LA:
Latching control of the Voltage Surge event
1
= Event is latched and needs to be cleared
0
= Event does not latch
bit 6
VSAG_LA:
Latching control of the Voltage Sag event
1
= Event is latched and needs to be cleared
0
= Event does not latch
bit 5
OVERPOW_LA:
Latching control of the Over Power event
1
= Event is latched and needs to be cleared
0
= Event does not latch
bit 4
OVERCUR_LA:
Latching control of the Over Current event
1
= Event is latched and needs to be cleared
0
= Event does not latch
bit 3
VSUR_TST:
Test control of the Voltage Surge event
1
= Simulated event is turned on
0
= Simulated Event is turned off
bit 2
VSAG_TST:
Test control of the Voltage Sag event
1
= Simulated event is turned on
0
= Simulated Event is turned off
bit 1
OVERPOW_TST:
Test control of the Over Power event
1
= Simulated Event is turned on
0
= Simulated Event is turned off
bit 0
OVERCUR_TST:
Test control of the Over Current event
1
= Simulated Event is turned on
0
= Simulated Event is turned off
Note:
Writing a 1 to the Clear bit, clears the event, either real or simulated through test bits, and then returns to
a state of 0.
REGISTER 7-1:
EVENT CONFIGURATION REGISTER (CONTINUED)



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