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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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DP83848JSQ/NOPB датащи(PDF) 71 Page - Texas Instruments |
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DP83848JSQ/NOPB датащи(HTML) 71 Page - Texas Instruments |
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71 / 84 page  Avoid Stubs Does Not Maintain Parallelism Ground or Power Plane DP83848H, DP83848J, DP83848K, DP83848M, DP83848T www.ti.com SNLS250E – MAY 2008 – REVISED APRIL 2015 7.3 Layout 7.3.1 Layout Guidelines Place the 49.9- Ω,1% resistors, and 0.1-μF decoupling capacitor near the PHYTER TD+/- and RD+/- pins and via directly to the VDD plane. Stubs should be avoided on all signal traces, especially the differential signal pairs. See Figure 7-11. Within the pairs (for example, TD+ and TD-) the trace lengths should be run parallel to each other and matched in length. Matched lengths minimize delay differences, avoiding an increase in common mode noise and increased EMI. See Figure 7-11. Figure 7-11. Differential Signal Pair - Stubs Ideally, there should be no crossover or via on the signal paths. Vias present impedance discontinuities and should be minimized. Route an entire trace pair on a single layer if possible. PCB trace lengths should be kept as short as possible. Signal traces should not be run such that they cross a plane split. See Figure 7-12. A signal crossing a plane split may cause unpredictable return path currents and would likely impact signal quality as well, potentially creating EMI problems. Copyright © 2008–2015, Texas Instruments Incorporated Application, Implementation, and Layout 71 Submit Documentation Feedback Product Folder Links: DP83848H DP83848J DP83848K DP83848M DP83848T |
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