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DP83848JSQ/NOPB датащи(PDF) 65 Page - Texas Instruments |
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DP83848JSQ/NOPB датащи(HTML) 65 Page - Texas Instruments |
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65 / 84 page ![]() 1:1 1:1 RJ45 NOTE: CENTER TAP IS PULLED TO VDD *PLACE CAPACITORS CLOSE TO THE TRANSFORMER CENTER TAPS RD- RD+ TD- TD+ 0.1 PF* 0.1 PF* COMMON MODE CHOKES MAY BE REQUIRED 0.1 PF 0.1 PF Vdd Vdd Vdd All values are typical and are +/- 1% 49.9 : 49.9 : 49.9 : 49.9 : PLACE RESISTORS AND CAPACITORS CLOSE TO THE DEVICE TPRDM TDRDP TPTDM TPTDP T1 DP83848H, DP83848J, DP83848K, DP83848M, DP83848T www.ti.com SNLS250E – MAY 2008 – REVISED APRIL 2015 Figure 7-2. 10/100 Mb/s Twisted Pair Interface 7.2.1.2 Clock IN (X1) Recommendations The DP83848x supports an external CMOS level oscillator source or a crystal resonator device. 7.2.1.2.1 Oscillator If an external clock source is used, X1 should be tied to the clock source and X2 should be left floating. The CMOS oscillator specifications for MII Mode are listed in Table 7-1. For RMII Mode, the CMOS oscillator specifications are listed in Table 7-2. For RMII mode, it is not recommended that the system clock out, Pin 21 of DP83848H, DP83848M, or DP83848T devices, be used as the reference clock to the MAC without first verifying the interface timing. See AN-1405 for more details. 7.2.1.2.2 Crystal A 25-MHz, parallel, 20-pF load crystal resonator should be used if a crystal source is desired. Figure 7-3 shows a typical connection for a crystal resonator circuit. The load capacitor values will vary with the crystal vendors; check with the vendor for the recommended loads. The oscillator circuit is designed to drive a parallel resonance AT cut crystal with a minimum drive level of 100 µW and a maximum of 500 µW. If a crystal is specified for a lower drive level, a current limiting resistor should be placed in series between X2 and the crystal. As a starting point for evaluating an oscillator circuit, if the requirements for the crystal are not known, CL1 and CL2 should be set at 33 pF, and R1 should be set at 0 Ω. Specification for 25-MHz crystal are listed in Table 7-3. Copyright © 2008–2015, Texas Instruments Incorporated Application, Implementation, and Layout 65 Submit Documentation Feedback Product Folder Links: DP83848H DP83848J DP83848K DP83848M DP83848T |
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