UCS2112 datasheet(46/64 Pages) MICROCHIP

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UCS2112

DS20005424B-page 46

 2015 Microchip Technology Inc.

GENERAL CONFIGURATION 2 REGISTER (ADDRESS 12H)

R/W-0

U-0

R/W-1

R/W-0

ALERT2_MASK ALERT2_LINK

DSCHG2

PWR_EN2S

—

ATT_TH2

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit

C = Clear on Read

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

ALERT2_MASK:

Mask errors for all interrupts in Register 9-4 except OV_LIM2 and TSD.

= The ALERT#2 pin will only assert if a OV_LIM2 or TSD is detected.

= The ALERT#2 pin will be asserted if an error condition or indicator event is detected.

bit 6

ALERT2_LINK:

Links the ALERT#2 pin to be asserted when the LOW_CUR2 or TREG bits are set.

= The ALERT#2 pin will be asserted if the LOW_CUR2 or TREG indicator bit is set.

= The ALERT#2 pin will not be asserted if the LOW_CUR2 or TREG indicator bit is set.

bit 5

DSCHG2:

Forces the VBUS2 to be reset and discharged when the UCS2112 is in the Active state.

Writing this bit to a logic ‘1' will cause the port power switch to be opened and the discharge circuitry

to activate to discharge VBUS. Actual discharge time is controlled by DISCHG_TIME<1:0>. This bit

is self-clearing.

=VBUS2 discharge initiated.

= Port 2 not in discharge

bit 4

PWR_EN2S:

Power Enable Port 2 override - This bit is OR’ed with the PWR_EN2 pin. Thus, if the

polarity is set to active-high, either the PWR_EN2 pin or this bit must be ‘1’ to enable the port power

switch.

bit 3-2

Unimplemented

bit 1-0

ATT_TH2<1:0>:

Attach Detection Threshold Port 2 - determines the current draw needed to deter-

mine an Attach event has occurred. Also controls the Removal Detection current level (Note 1).

= 200 µA Attach/100 µA Removal

= 400 µA Attach/300 µA Removal

= 800 µA Attach/700 µA Removal

= 1000 µA Attach/900 µA Removal

Note

The removal threshold is different when operating in the Active power state versus when operating in the Detect power

state.

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