UCS2112 datasheet(22/64 Pages) MICROCHIP

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UCS2112

DS20005424B-page 22

 2015 Microchip Technology Inc.

5.1.3

DETECT STATE OPERATION

When the UCS2112 is in the Detect state, the port power

switch will be disabled. The VBUS output will be con-

nected to the VDD voltage by a secondary bypass switch.

There are two methods for transitioning from the Detect

state to the Active state: automatic and host-controlled.

5.1.3.1

Automatic Transition

from Detect to Active

For the Detect state, enable PWR_EN1 and/or

PWR_EN2, and supply VDD ≥ VDD_TH. When a porta-

ble device is attached and an Attach Detection event

occurs, the UCS2112 will automatically transition to the

Active state.

5.1.3.2

State Change from Detect to Active

When conditions cause the UCS2112 to transition from

the Detect state to the Active state, the following

occurs:

• The Attach Detection feature will be disabled; the

Removal Detection feature remains enabled.

• The bypass switch will be turned off.

• The discharge switch will be turned on briefly for

tDISCHARGE.

• The port power switch will be turned on.

5.1.4

ACTIVE STATE OPERATION

Every time the UCS2112 enters the Active state, the

port power switches are closed. The UCS2112 cannot

be in the Active state (and therefore, the port power

switch cannot be turned on) if any of the following con-

ditions exist:

•VS <VS_UVLO

• PWR_EN1 and PWR_EN2 are disabled.

5.1.5

ERROR STATE OPERATION

The UCS2112 will enter the Error state from the Active

state when any of the following events are detected:

• The maximum allowable internal die temperature

(TTSD) has been exceeded.

• An overcurrent condition has been detected.

• An undervoltage condition on either VBUS pin has

been detected (see Section 5.3.4 “Undervoltage

Lockout on VS”

• A back-drive condition has been detected (see

Section 5.3.2 “Back-voltage Detection”

• A discharge error has been detected.

• An overvoltage condition on the VS pin.

The UCS2112 will enter the Error state from the Detect

state when a back-drive condition has been detected

on either port, or when the maximum allowable internal

die temperature has been exceeded.

The UCS2112 will enter the Error state from the Sleep

state when a back-drive condition has been detected.

When the UCS2112 enters the Error state, the port

power switch and the VBUS bypass switch will be dis-

abled while the ALERT# pin is asserted (by default).

They will remain off while in this power state. The

UCS2112 will leave this state as determined by the fault

handling selection.

With the Auto-recovery fault handler, after the tCYCLE

time period, the UCS2112 will check that all of the error

conditions have been removed.

If all of the error conditions have been removed, the

UCS2112 will return to the Active state or Detect state,

as applicable.

If the device is in the Error state and a Removal Detec-

tion event occurs, it will check the error conditions and

then return to the power state defined.

5.2

Communication

The UCS2112 can operate in SMBus mode (see

Section 8.0 “System Management Bus Protocol”

)

or Stand-alone mode. The resistor connected to the

COMM_ILIM pin determines the operating mode and

the hardware-set ILIM setting, as shown in Table 5-3.

Unless connected to GND or VDD, the resistors in

Table 5-3 are external pull-down resistors.

The SMBus address is specified in Section 8.2

“SMBus Address and RD/WR Bit”

TABLE 5-3:

COMMUNICATION DECODE

COMM_ILIM Pulldown

Resistor (±1%)

PWR_EN1 and

PWR_EN2 Polarity

ILIM (A)

Total ILIM (A)

(Note 1)

Communication

Mode

GND

Active-High

0.53

0.53+0.53

SMBUS

10 k



Active-High

0.96

0.96+0.96

SMBUS

12 k



Active-High

1.07

1.07+1.07

SMBUS

15 k



Active-High

1.28

1.28+1.28

SMBUS

18 k



Active-High

1.6

1.6+1.6

SMBUS

22 k



Active-High

2.13

2.13+2.13

SMBUS

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