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HM17CM256 датащи(PDF) 72 Page - Hynix Semiconductor |
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HM17CM256 датащи(HTML) 72 Page - Hynix Semiconductor |
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72 / 111 page ![]() HM17CM256 - 72 - (34-23)Set read address of internal register CS RS RD WR RE2 RE1 RE0 D7 D6 D5 D4 D3 D2 D1 D0 0 1 1 0 1 0 0 1 1 0 0 RA3 RA2 RA1 RA0 ( reset :{RA3, RA2, RA1, RA0}=BH) Before executing the internal register data read command the address of register should be specified first. For example, when display control (1) is being read out, { RA3, RA2, RA1, RA0 } = 8H should be specified first. Because selected register is corresponded with RE flag, please set RE flag first and then read out the register. Refer to the command function description and the lists of commands for the address of each register. (34-24) Internal register data read CS RS RD WR RE2 RE1 RE0 D7 D6 D5 D4 D3 D2 D1 D0 0 1 1 0 0/1 0/1 0/1 * * * * Internal register data read * : “Don’t care” This command is used to read out internal register data. Before executing this command, RE flag and the address for internal register to read should be set first. (34-25) Window end X address set CS RS RD WR RE2 RE1 RE0 D7 D6 D5 D4 D3 D2 D1 D0 0 1 1 0 1 0 1 0 0 0 0 EX3 EX2 EX1 EX0 ( reset :{EX3~EX0}=0H, read address :0H) CS RS RD WR RE2 RE1 RE0 D7 D6 D5 D4 D3 D2 D1 D0 0 1 1 0 1 0 1 0 0 0 1 * EX6 EX5 EX4 ( reset :{EX6~EX4}=0H, read address :1H) * : “Don’t care” When the window area of RAM is specified(WIN=“1”) to access, the end X address of the window is set by this command. The lower 4 bits of address should be set first and then upper 3 bits are set later (34-26) Window end Y address set CS RS RD WR RE2 RE1 RE0 D7 D6 D5 D4 D3 D2 D1 D0 0 1 1 0 1 0 1 0 0 1 0 EY3 EY2 EY1 EY0 ( reset :{EY3~EY0}=0H, read address :2H) CS RS RD WR RE2 RE1 RE0 D7 D6 D5 D4 D3 D2 D1 D0 0 1 1 0 1 0 1 0 0 1 1 * EY6 EY5 EY4 ( reset :{EY6~EY4}=0H, read address :3H) * : “Don’t care” When window area of RAM is specified(WIN=“1”) to access , the end Y address of the window is set by this command. The lower 4 bits of address should be set first and then upper 3 bits are set later. |
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