HM17CM256 datasheet(32/111 Pages) HYNIX

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HM17CM256

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gradation level table (MON=”1”, Black & white mode)

(MSB)RAM data (LSB)

Gradation level

RAM data

GLSB

Gradation level

* : Don’t Care

(12)

GRADATION LSB CONTROL

At 256 colors input mode, this IC provides segment driver output for 8-gradation display using

successive 3 bits of data and that for 4-gradation display using successive 2 bits of data.

The segment driver output for the 4-gradation display uses 2 bits written to the corresponding RAM

area and 1 bit supplemented by the gradation LSB circuit, and then selects 4 gradations from 8-

gradations.

At fixed gradation mode, the segment driver output for the 4-gradation display result in a gradation

level of 0 regardless of gradation LSB register, when 2 bits of data on the display RAM are “00”.

When 2 bits of data on the display RAM is “11”, a gradation level of 7/7 is selected regardless of

gradation LSB register.

The other gradation levels are selected depending on 2 bits of data on the

display RAM and the gradation LSB register.

One bit of data is supplemented by setting the gradation LSB register (GLSB).

For this register, the bit information specified for only one time setting is used as the LSB of the

RAM for all the 4-gradation segment drivers.

Gradation LSB = “0”: Set 0 as the LSB of the RAM for 4-gradation segment drivers.

Gradation LSB = “1”: Set 1 as the LSB of the RAM for 4-gradation segment drivers.

(13)

GRADATION PALETTE

This IC has two gradation display modes, the fixed gradation display mode and the variable

gradation display mode.

Select mode by setting the gradation display mode register (PWM command) to the purpose.

PWM=”0” : variable gradation mode among 32-level gradations.

PWM=”1” : fixed 8 gradation mode

To select the best gradation level suited to LCD panel at variable gradation display mode, use the

gradation palette register among 32-level gradation palettes.

Segment driver outputs are set by

selected 8-level gradation palette.

The gradation palette register provides three registers ( palette Aj, Bj, and Cj : j=0

∼7 ) for the

segment driver outputs, SEGAi(0

∼127), SEGBi(0∼127), and SEGCi(0∼127) .

Each register

consists of a 5-bit register, selecting 8 gradations from the 32 gradation pattern.

Segment driver selects 4 gradations among 8 gradation by 2 bits wrote-in RAM and 1bit calibrated

by GLSB.

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