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PRIXP425BD датащи(PDF) 99 Page - Intel Corporation

номер детали PRIXP425BD
подробное описание детали  Intel짰 IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
PDF  112 Pages
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производитель  INTEL [Intel Corporation]
домашняя страница  http://www.intel.com
Logo INTEL - Intel Corporation

PRIXP425BD датащи(HTML) 99 Page - Intel Corporation

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Intel® IXP42X Product Line and IXC1100 Control Plane Processor
Electrical Specifications
Datasheet
99
Figure 29.
HPI – 8 Mode Write Accesses
Table 56.
HPI Timing Symbol Description
State
Description
Min
Max
Unit
Notes
T1
Address Timing
3
4
Cycles
1, 5, 6
T2
Setup/Chip Select Timing
3
4
Cycles
2, 6
T3
Strobe Timing
2
16
Cycles
3, 5, 6
T4
Hold Timing
3
4
Cycles
6
T5
Recovery Phase
2
17
Cycles
6
Table 57.
HPI – 8 Mode Write Accesses Values
Symbol
Parameter
Min.
Max. Units
Notes
Tadd_setup
Valid time that address is asserted on the line. The
address is asserted at the same time as chip select.
11
45
Cycles 1, 5, 6
Tcs2hds1val
Delay from chip select being active and the HDS1 data
strobe being active.
3
4
Cycles 5, 6
Thds1_pulse
Pulse width of the HDS1 data strobe
4
5
Cycles 2, 4, 5
Tdata_setup
Data valid prior to the rising edge of the HDS1 data
strobe.
4
5
Cycles 3, 5, 6
Tdata_hold
Data valid after the rising edge of the HDS1 data strobe.
4
36
Cycles 3, 6
Trecov
Time required between successive accesses on the
expansion interface.
217
Cycles 4, 6
EX_ADDR[2:1]
(hcntl)
EX_ADDR[0]
(hbil)
EX_RDY_N
(hrdy)
Data
EX_DATA
(hdin)
EX_CS_N
(hcs_n)
EX_WR_N
(hds1_n)
EX_RD_N
(hr_w_n)
Valid
Data
Valid
EX_CLK
T1
T3
T4
T3
T2
T4
T5
T1
T2
T5
Tadd_setup
Tcs2hds1val
Thds1_pulse
Tdata_setup
Tdata_hold
Trecov



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