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AS3543-ECTP датащи(PDF) 69 Page - ams AG

номер детали AS3543-ECTP
подробное описание детали  High End Stereo Audio Codec wi th System PMU
PDF  92 Pages
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производитель  AMSCO [ams AG]
домашняя страница  http://www.ams.com
Logo AMSCO - ams AG

AS3543-ECTP датащи(HTML) 69 Page - ams AG

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Revision 1.11
68 - 91
AS3543 3v2
Data Sheet - R e g i s t e r D e f i n i t i o n
Table 63. PVDD2 Register
Name
Base
Default
PVDD2
2-wire serial
00h
Offset: 18h-2
PVDD2 Control Register
This is an extended register and needs to be enabled by writing 010b to Reg. 1Ch first.
This register is reset at a AVDD27-POR.
Bit
Bit Name
Default
Access
Bit Description
7
PVDD2_OFF
0
R/W
Switches off PVDD2 regulator
0: normal mode
1: PVDD1 switched off
6
ILIM_H_PVDD2
0
R/W
Selects the higher current limit for PVDD2
0: default mode, 100mA
1: 200mA mode
5
PRG_PVDD2
0
R/W
Selects the output voltage control mode for PVDD2
0: PVDD2 is in default mode controlled by pin VPRG2
1: PVDD2 is register controlled (Reg. 18-2h)
4:0
VSEL_PVDD2<4:0>
00000
R/W
Sets the LDO output voltage in register control mode (default
voltage of the regulator is selcted by pin VPRG2)
0x00-0x0F: 1.2V+VSEL*50mV ->(1.2V - 1.95V)
0x10-0x1F: 2.0V + (VSEL-0x10)*100mV -> (2.0V-3.5V)
Table 64. AVDD27 Register
Name
Base
Default
AVDD27
2-wire serial
00h
Offset: 18h-6
AVDD27 Control Register
This is an extended register and needs to be enabled by writing 110b to Reg. 1Ch first.
This register is reset at a AVDD27-POR.
Bit
Bit Name
Default
Access
Bit Description
7
-
0
n/a
6
ILIM_H_VDD27
0
R/W
Selects the higher current limit for AVDD27
0: default mode, 100mA
1: 200mA mode
5
PRG_AVDD27
0
R/W
Selects the output voltage control mode for AVDD27
0: AVDD27 is in default mode (2.7V)
1: AVDD27 is register controlled (Reg. 18-6h)
5
-
0
n/a
3:0
VSEL_AVDD27<3:0>
0000
R/W
Sets the LDO output voltage in register control mode (default
voltage of the regulator is 2.7V)
0x0-0x2: 2.3V
0x3-0xF: 2.0V + VSEL*100mV -> (2.3V-3.5V)



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