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A3P030 датащи(PDF) 40 Page - Microsemi Corporation

номер детали A3P030
подробное описание детали  ProASIC3 Flash Family FPGAs with Optional Soft ARM Support
PDF  220 Pages
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производитель  MICROSEMI [Microsemi Corporation]
домашняя страница  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

A3P030 датащи(HTML) 40 Page - Microsemi Corporation

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ProASIC3 DC and Switching Characteristics
2-26
Revision 13
Table 2-29 • I/O Output Buffer Maximum Resistances 1
Applicable to Standard Plus I/O Banks
Standard
Drive Strength
RPULL-DOWN ()2
RPULL-UP ()3
3.3 V LVTTL / 3.3 V LVCMOS
2 mA
100
300
4 mA
100
300
6 mA
50
150
8 mA
50
150
12 mA
25
75
16 mA
25
75
3.3 V LVCMOS Wide Range4
100 µA
Same as regular
3.3 V LVCMOS
Same as regular
3.3 V LVCMOS
2.5 V LVCMOS
2 mA
100
200
4 mA
100
200
6 mA
50
100
8 mA
50
100
12 mA
25
50
1.8 V LVCMOS
2 mA
200
225
4 mA
100
112
6 mA
50
56
8 mA
50
56
1.5 V LVCMOS
2 mA
200
224
4 mA
100
112
3.3 V PCI/PCI-X
Per PCI/PCI-X
specification
25
75
Notes:
1. These maximum values are provided for informational reasons only. Minimum output buffer resistance
values depend on VCCI, drive strength selection, temperature, and process. For board design
considerations and detailed output buffer resistances, use the corresponding IBIS models located at
http://www.microsemi.com/soc/download/ibis/default.aspx.
2. R(PULL-DOWN-MAX) = (VOLspec) / IOLspec
3. R(PULL-UP-MAX) = (VCCImax – VOHspec) / IOHspec
4. All LVCMOS 3.3 V software macros support LVCMOS 3.3 V wide range as specified in the JESD-8B
specification.



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