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AGLP030 датащи(PDF) 71 Page - Microsemi Corporation |
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AGLP030 датащи(HTML) 71 Page - Microsemi Corporation |
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71 / 134 page ![]() IGLOO PLUS Low Power Flash FPGAs Revision 16 2-57 Global Resource Characteristics AGLP125 Clock Tree Topology Clock delays are device-specific. Figure 2-21 is an example of a global tree used for clock routing. The global tree presented in Figure 2-21 is driven by a CCC located on the west side of the AGLP125 device. It is used to drive all D-flip-flops in the device. Figure 2-21 • Example of Global Tree Use in an AGLP125 Device for Clock Routing Central Global Rib VersaTile Rows Global Spine CCC |
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