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AGLP030 датащи(PDF) 41 Page - Microsemi Corporation |
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AGLP030 датащи(HTML) 41 Page - Microsemi Corporation |
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41 / 134 page ![]() IGLOO PLUS Low Power Flash FPGAs Revision 16 2-27 Single-Ended I/O Characteristics 3.3 V LVTTL / 3.3 V LVCMOS Low-Voltage Transistor–Transistor Logic (LVTTL) is a general-purpose standard (EIA/JESD) for 3.3 V applications. It uses an LVTTL input buffer and push-pull output buffer. Table 2-34 • Minimum and Maximum DC Input and Output Levels 3.3 V LVTTL / 3.3 V LVCMOS VIL VIH VOL VOH IOL IOH IOSL IOSH IIL1 IIH2 Drive Strength Min. V Max. V Min. V Max. V Max. V Min. VmA mA Max. mA3 Max. mA3 µA4 µA4 2 mA –0.3 0.8 2 3.6 0.4 2.4 2 2 25 27 10 10 4 mA –0.3 0.8 2 3.6 0.4 2.4 4 4 25 27 10 10 6 mA –0.3 0.8 2 3.6 0.4 2.4 6 6 51 54 10 10 8 mA –0.3 0.8 2 3.6 0.4 2.4 8 8 51 54 10 10 12 mA –0.3 0.8 2 3.6 0.4 2.4 12 12 103 109 10 10 16 mA –0.3 0.8 2 3.6 0.4 2.4 16 16 103 109 10 10 Notes: 1. IIL is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL. 2. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is larger when operating outside recommended ranges. 3. Currents are measured at high temperature (100°C junction temperature) and maximum voltage. 4. Currents are measured at 85°C junction temperature. 5. Software default selection highlighted in gray. Figure 2-7 • AC Loading Table 2-35 • AC Waveforms, Measuring Points, and Capacitive Loads Input Low (V) Input High (V) Measuring Point* (V) CLOAD (pF) 03.3 1.4 5 Note: *Measuring point = Vtrip. See Table 2-23 on page 2-21 for a complete table of trip points. Test Point Test Point Enable Path Datapath 5 pF R = 1 k R to VCCI for tLZ / tZL / tZLS R to GND for tHZ / tZH / tZHS 5 pF for tZH / tZHS / tZL / tZLS 5 pF for tHZ / tLZ |
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