AGLP030 datasheet(25/134 Pages) MICROSEMI

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IGLOO PLUS Low Power Flash FPGAs

Revision 16

2-11

Table 2-16 • Different Components Contributing to the Static Power Consumption in IGLOO PLUS Devices

For IGLOO PLUS V2 or V5 Devices, 1.5 V Core Supply Voltage

Parameter

Definition

Device-Specific Static Power (mW)

AGLP125

AGLP060

AGLP030

PDC1

Array static power in Active mode

See Table 2-12 on page 2-8

PDC2

Array static power in Static (Idle) mode

See Table 2-11 on page 2-8

PDC3

Array static power in Flash*Freeze mode

See Table 2-9 on page 2-7

PDC4

Static PLL contribution

1.841

PDC5

Bank quiescent power (VCCI-dependent)

See Table 2-12 on page 2-8

Notes:

1. This is the minimum contribution of the PLL when operating at lowest frequency.

2. For a different output load, drive strength, or slew rate, Microsemi recommends using the Microsemi power spreadsheet

calculator or the SmartPower tool in Libero SoC software.

Table 2-17 • Different Components Contributing to Dynamic Power Consumption in IGLOO PLUS Devices

For IGLOO PLUS V2 Devices, 1.2 V Core Supply Voltage

Parameter

Definition

Device-Specific Dynamic Power

(µW/MHz)

AGLP125 AGLP060 AGLP030

PAC1

Clock contribution of a Global Rib

2.874

1.727

0.0001

PAC2

Clock contribution of a Global Spine

1.264

1.244

2.241

PAC3

Clock contribution of a VersaTile row

0.963

0.975

0.981

PAC4

Clock contribution of a VersaTile used as a sequential module

0.098

0.096

PAC5

First contribution of a VersaTile used as a sequential module

0.018

PAC6

Second contribution of a VersaTile used as a sequential module

0.203

PAC7

Contribution of a VersaTile used as a combinatorial module

0.160

0.170

0.158

PAC8

Average contribution of a routing net

0.679

0.686

0.748

PAC9

Contribution of an I/O input pin (standard-dependent)

See Table 2-13 on page 2-9

PAC10

Contribution of an I/O output pin (standard-dependent)

See Table 2-14 on page 2-9

PAC11

Average contribution of a RAM block during a read operation

25.00

PAC12

Average contribution of a RAM block during a write operation

30.00

PAC13

Dynamic contribution for PLL

2.10

Note: 1. There is no Center Global Rib present in AGLP030, and thus it starts directly at the spine resulting in

0µW/MHz.

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