 |
поискавой системы для электроныых деталей |
|
|
поискавой системы для электроныых деталей |
|
18F8680 датащи(PDF) 78 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
18F8680 датащи(HTML) 78 Page - Microchip Technology |
|
|
78 / 496 page  PIC18F6585/8585/6680/8680 DS30491C-page 76 2004 Microchip Technology Inc. B2CON(5, 7) RXFUL/ TXBIF RXM1/ TXABT RTRRO/ TXLARB FILHIT4/ TXERR FILHIT3/ TXREQ FILHIT2/ RTREN FILHIT1/ TXPRI1 FILHIT0/ TXPRI0 0000 0000 45, 230 B1D7(7) B1D77 B1D76 B1D75 B1D74 B1D73 B1D72 B1D71 B1D70 xxxx xxxx 45, 230 B1D6(7) B1D67 B1D66 B1D65 B1D64 B1D63 B1D62 B1D61 B1D60 xxxx xxxx 45, 230 B1D5(7) B1D57 B1D56 B1D55 B1D54 B1D53 B1D52 B1D51 B1D50 xxxx xxxx 45, 230 B1D4(7) B1D47 B1D46 B1D45 B1D44 B1D43 B1D42 B1D41 B1D40 xxxx xxxx 45, 230 B1D3(7) B1D37 B1D36 B1D35 B1D34 B1D33 B1D32 B1D31 B1D30 xxxx xxxx 45, 230 B1D2(7) B1D27 B1D26 B1D25 B1D24 B1D23 B1D22 B1D21 B1D20 xxxx xxxx 45, 230 B1D1(7) B1D17 B1D16 B1D15 B1D14 B1D13 B1D12 B1D11 B1D10 xxxx xxxx 46, 230 B1D0(7) B1D07 B1D06 B1D05 B1D04 B1D03 B1D02 B1D01 B1D00 xxxx xxxx 46, 230 B1DLC(7) — RXRTR RB1 RB0 DLC3 DLC2 DLC1 DLC0 -xxx xxxx 46, 230 B1EIDL(7) EID7 EID6 EID5 EID4 EID3 EID2 EID1 EID0 xxxx xxxx 46, 230 B1EIDH(7) EID15 EID14 EID13 EID12 EID11 EID10 EID9 EID8 xxxx xxxx 46, 230 B1SIDL(7) SID2 SID1 SID0 SRR EXID —EID17 EID16 xxxx x-xx 46, 230 B1SIDH(7) SID10 SID9 SID8 SID7 SID6 SID5 SID4 SID3 xxxx xxxx 46, 230 B1CON(5, 7) RXFUL/ TXBIF RXM1/ TXABT RTRRO/ TXLARB FILHIT4/ TXERR FILHIT3/ TXREQ FILHIT2/ RTREN FILHIT1/ TXPRI1 FILHIT0/ TXPRI0 0000 0000 46, 230 B0D7(7) B0D77 B0D76 B0D75 B0D74 B0D73 B0D72 B0D71 B0D70 xxxx xxxx 46, 230 B0D6(7) B0D67 B0D66 B0D65 B0D64 B0D63 B0D62 B0D61 B0D60 xxxx xxxx 46, 230 B0D5(7) B0D57 B0D56 B0D55 B0D54 B0D53 B0D52 B0D51 B0D50 xxxx xxxx 46, 230 B0D4(7) B0D47 B0D46 B0D45 B0D44 B0D43 B0D42 B0D41 B0D40 xxxx xxxx 46, 230 B0D3(7) B0D37 B0D36 B0D35 B0D34 B0D33 B0D32 B0D31 B0D30 xxxx xxxx 46, 230 B0D2(7) B0D27 B0D26 B0D25 B0D24 B0D23 B0D22 B0D21 B0D20 xxxx xxxx 46, 230 B0D1(7) B0D17 B0D16 B0D15 B0D14 B0D13 B0D12 B0D11 B0D10 xxxx xxxx 46, 230 B0D0(7) B0D07 B0D06 B0D05 B0D04 B0D03 B0D02 B0D01 B0D00 xxxx xxxx 46, 230 B0DLC(7) — RTR RB1 RB0 DLC3 DLC2 DLC1 DLC0 -xxx xxxx 46, 230 B0EIDL(7) EID7 EID6 EID5 EID4 EID3 EID2 EID1 EID0 xxxx xxxx 46, 230 B0EIDH(7) EID15 EID14 EID13 EID12 EID11 EID10 EID9 EID8 xxxx xxxx 46, 230 B0SIDL(7) SID2 SID1 SID0 SRR EXID —EID17 EID16 xxxx x-xx 46, 230 B0SIDH(7) SID10 SID9 SID8 SID7 SID6 SID5 SID4 SID3 xxxx xxxx 46, 230 B0CON(5, 7) RXFUL/ TXBIF RXM1/ TXABT RTRRO/ TXLARB FILHIT4/ TXERR FILHIT3/ TXREQ FILHIT2/ RTREN FILHIT1/ TXPRI1 FILHIT0/ TXPRI0 0000 0000 46, 230 TXBIE(7) — — — TXB2IE TXB1IE TXB0IE — — ---0 00-- 46, 230 BIE0(7) B5IE B4IE B3IE B2IE B1IE B0IE RXB1IE RXB0IE 0000 0000 46, 230 BSEL0(7) B5TXEN B4TXEN B3TXEN B2TXEN B1TXEN B0TXEN — — 0000 00-- 46, 230 MSEL3(7) FIL15_1 FIL15_0 FIL14_1 FIL14_0 FIL13_1 FIL13_0 FIL12_1 FIL12_0 0000 0000 46, 230 MSEL2(7) FIL11_1 FIL11_0 FIL10_1 FIL10_0 FIL9_1 FIL9_0 FIL8_1 FIL8_0 0000 0000 46, 230 MSEL1(7) FIL7_1 FIL7_0 FIL6_1 FIL6_0 FIL5_1 FIL5_0 FIL4_1 FIL4_0 0000 0101 46, 230 MSEL0(7) FIL3_1 FIL3_0 FIL2_1 FIL2_0 FIL1_1 FIL1_0 FIL0_1 FIL0_0 0101 0000 46, 230 SDFLC(7) — — — DFLC4 DFLC3 DFLC2 DFLC1 DFLC0 ---0 0000 46, 230 RXFCON1(7) RXF15EN RXF14EN RXF13EN RXF12EN RXF11EN RXF10EN RXF9EN RXF8EN 0000 0000 46, 230 RXFCON0(7) RXF7EN RXF6EN RXF5EN RXF4EN RXF3EN RXF2EN RXF1EN RXF0EN 0011 1111 47, 230 TABLE 4-3: REGISTER FILE SUMMARY (CONTINUED) File Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR, BOR Details on page: Legend: x = unknown, u = unchanged, – = unimplemented, q = value depends on condition Note 1: RA6 and associated bits are configured as port pins in RCIO and ECIO Oscillator mode only and read ‘0’ in all other oscillator modes. 2: Bit 21 of the TBLPTRU allows access to the device configuration bits. 3: These registers are unused on PIC18F6X80 devices; always maintain these clear. 4: These bits have multiple functions depending on the CAN module mode selection. 5: Meaning of this register depends on whether this buffer is configured as transmit or receive. 6: RG5 is available as an input when MCLR is disabled. 7: This register reads all ‘0’s until the ECAN module is set up in Mode 1 or Mode 2. |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Russian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
