18F8680 datasheet(42/496 Pages) MICROCHIP

42 / 496 page

PIC18F6585/8585/6680/8680

DS30491C-page 40

 2004 Microchip Technology Inc.

PORTJ

PIC18F6X8X PIC18F8X8X

xxxx xxxx

uuuu uuuu

PORTH

PIC18F6X8X PIC18F8X8X

0000 xxxx

0000 uuuu

uuuu uuuu

PORTG

PIC18F6X8X PIC18F8X8X

--xx xxxx

--uu uuuu

PORTF

PIC18F6X8X PIC18F8X8X

x000 0000

u000 0000

PORTE

PIC18F6X8X PIC18F8X8X

---- -000

---- -uuu

PORTD

PIC18F6X8X PIC18F8X8X

xxxx xxxx

uuuu uuuu

PORTC

PIC18F6X8X PIC18F8X8X

xxxx xxxx

uuuu uuuu

PORTB

PIC18F6X8X PIC18F8X8X

xxxx xxxx

uuuu uuuu

PORTA(5,6)

PIC18F6X8X PIC18F8X8X

-x0x 0000(5)

-u0u 0000(5)

-uuu uuuu(5)

SPBRGH

PIC18F6X8X PIC18F8X8X

0000 0000

uuuu uuuu

BAUDCON

PIC18F6X8X PIC18F8X8X

-1-0 0-00

-u-u u-uu

ECCP1DEL

PIC18F6X8X PIC18F8X8X

0000 0000

uuuu uuuu

ECANCON

PIC18F6X8X PIC18F8X8X

0001 0000

uuuu uuuu

TXERRCNT

PIC18F6X8X PIC18F8X8X

0000 0000

uuuu uuuu

RXERRCNT

PIC18F6X8X PIC18F8X8X

0000 0000

uuuu uuuu

COMSTAT

PIC18F6X8X PIC18F8X8X

0000 0000

uuuu uuuu

CIOCON

PIC18F6X8X PIC18F8X8X

0000 ----

uuuu ----

BRGCON3

PIC18F6X8X PIC18F8X8X

00-- -000

uu-- -uuu

BRGCON2

PIC18F6X8X PIC18F8X8X

0000 0000

uuuu uuuu

BRGCON1

PIC18F6X8X PIC18F8X8X

0000 0000

uuuu uuuu

CANCON

PIC18F6X8X PIC18F8X8X

1000 000-

uuuu uuu-

CANSTAT

PIC18F6X8X PIC18F8X8X

100- 000-

uuu- uuu-

RXB0D7

PIC18F6X8X PIC18F8X8X

xxxx xxxx

uuuu uuuu

RXB0D6

PIC18F6X8X PIC18F8X8X

xxxx xxxx

uuuu uuuu

RXB0D5

PIC18F6X8X PIC18F8X8X

xxxx xxxx

uuuu uuuu

RXB0D4

PIC18F6X8X PIC18F8X8X

xxxx xxxx

uuuu uuuu

RXB0D3

PIC18F6X8X PIC18F8X8X

xxxx xxxx

uuuu uuuu

RXB0D2

PIC18F6X8X PIC18F8X8X

xxxx xxxx

uuuu uuuu

RXB0D1

PIC18F6X8X PIC18F8X8X

xxxx xxxx

uuuu uuuu

RXB0D0

PIC18F6X8X PIC18F8X8X

xxxx xxxx

uuuu uuuu

RXB0DLC

PIC18F6X8X PIC18F8X8X

-xxx xxxx

-uuu uuuu

TABLE 3-3:

INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)

Applicable Devices

Power-on Reset,

Brown-out Reset

MCLR Resets

WDT Reset

RESET

Instruction

Stack Resets

Wake-up via WDT

or Interrupt

Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.

Shaded cells indicate conditions do not apply for the designated device.

Note 1:

One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the

interrupt vector (0008h or 0018h).

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are

updated with the current value of the PC. The STKPTR is modified to point to the next location in the

hardware stack.

See Table 3-2 for Reset value for specific condition.

Bit 6 of PORTA, LATA, and TRISA are enabled in ECIO and RCIO Oscillator modes only. In all other

oscillator modes, they are disabled and read ‘0’.

Bit 6 of PORTA, LATA and TRISA are not available on all devices. When unimplemented, they read ‘0’.

This register reads all ‘0’s until ECAN is set up in Mode 1 or Mode 2.

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