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18F8680 датащи(PDF) 75 Page - Microchip Technology

номер детали 18F8680
подробное описание детали  64/68/80-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontrollers with ECAN Module
PDF  496 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

18F8680 датащи(HTML) 75 Page - Microchip Technology

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 2004 Microchip Technology Inc.
DS30491C-page 73
PIC18F6585/8585/6680/8680
RXF15EIDH(7)
EID15
EID14
EID13
EID12
EID11
EID10
EID9
EID8
xxxx xxxx
47, 230
RXF15SIDL(7)
SID2
SID1
SID0
—EXIDEN
—EID17
EID16
xx-x x-xx
47, 230
RXF15SIDH(7)
SID10
SID9
SID8
SID7
SID6
SID5
SID4
SID3
xxxx xxxx
47, 230
RXF14EIDL(7)
EID7
EID6
EID5
EID4
EID3
EID2
EID1
EID0
xxxx xxxx
47, 230
RXF14EIDH(7)
EID15
EID14
EID13
EID12
EID11
EID10
EID9
EID8
xxxx xxxx
47, 230
RXF14SIDL(7)
SID2
SID1
SID0
—EXIDEN
—EID17
EID16
xx-x x-xx
47, 230
RXF14SIDH(7)
SID10
SID9
SID8
SID7
SID6
SID5
SID4
SID3
xxxx xxxx
47, 230
RXF13EIDL(7)
EID7
EID6
EID5
EID4
EID3
EID2
EID1
EID0
xxxx xxxx
47, 230
RXF13EIDH(7)
EID15
EID14
EID13
EID12
EID11
EID10
EID9
EID8
xxxx xxxx
47, 230
RXF13SIDL(7)
SID2
SID1
SID0
—EXIDEN
—EID17
EID16
xx-x x-xx
47, 230
RXF13SIDH(7)
SID10
SID9
SID8
SID7
SID6
SID5
SID4
SID3
xxxx xxxx
47, 230
RXF12EIDL(7)
EID7
EID6
EID5
EID4
EID3
EID2
EID1
EID0
xxxx xxxx
47, 230
RXF12EIDH(7)
EID15
EID14
EID13
EID12
EID11
EID10
EID9
EID8
xxxx xxxx
47, 230
RXF12SIDL(7)
SID2
SID1
SID0
—EXIDEN
—EID17
EID16
xx-x x-xx
47, 230
RXF12SIDH(7)
SID10
SID9
SID8
SID7
SID6
SID5
SID4
SID3
xxxx xxxx
47, 230
RXF11EIDL(7)
EID7
EID6
EID5
EID4
EID3
EID2
EID1
EID0
xxxx xxxx
47, 230
RXF11EIDH(7)
EID15
EID14
EID13
EID12
EID11
EID10
EID9
EID8
xxxx xxxx
47, 230
RXF11SIDL(7)
SID2
SID1
SID0
—EXIDEN
—EID17
EID16
xx-x x-xx
47, 230
RXF11SIDH(7)
SID10
SID9
SID8
SID7
SID6
SID5
SID4
SID3
xxxx xxxx
47, 230
RXF10EIDL(7)
EID7
EID6
EID5
EID4
EID3
EID2
EID1
EID0
xxxx xxxx
47, 230
RXF10EIDH(7)
EID15
EID14
EID13
EID12
EID11
EID10
EID9
EID8
xxxx xxxx
47, 230
RXF10SIDL(7)
SID2
SID1
SID0
—EXIDEN
—EID17
EID16
xx-x x-xx
48, 230
RXF10SIDH(7)
SID10
SID9
SID8
SID7
SID6
SID5
SID4
SID3
xxxx xxxx
48, 230
RXF9EIDL(7)
EID7
EID6
EID5
EID4
EID3
EID2
EID1
EID0
xxxx xxxx
47, 230
RXF9EIDH(7)
EID15
EID14
EID13
EID12
EID11
EID10
EID9
EID8
xxxx xxxx
48, 230
RXF9SIDL(7)
SID2
SID1
SID0
—EXIDEN
—EID17
EID16
xx-x x-xx
48, 230
RXF9SIDH(7)
SID10
SID9
SID8
SID7
SID6
SID5
SID4
SID3
xxxx xxxx
48, 230
RXF8EIDL(7)
EID7
EID6
EID5
EID4
EID3
EID2
EID1
EID0
xxxx xxxx
48, 230
RXF8EIDH(7)
EID15
EID14
EID13
EID12
EID11
EID10
EID9
EID8
xxxx xxxx
48, 230
RXF8SIDL(7)
SID2
SID1
SID0
—EXIDEN
—EID17
EID16
xx-x x-xx
48, 230
RXF8SIDH(7)
SID10
SID9
SID8
SID7
SID6
SID5
SID4
SID3
xxxx xxxx
48, 230
RXF7EIDL(7)
EID7
EID6
EID5
EID4
EID3
EID2
EID1
EID0
xxxx xxxx
48, 230
RXF7EIDH(7)
EID15
EID14
EID13
EID12
EID11
EID10
EID9
EID8
xxxx xxxx
48, 230
RXF7SIDL(7)
SID2
SID1
SID0
—EXIDEN
—EID17
EID16
xx-x x-xx
48, 230
RXF7SIDH(7)
SID10
SID9
SID8
SID7
SID6
SID5
SID4
SID3
xxxx xxxx
48, 230
RXF6EIDL(7)
EID7
EID6
EID5
EID4
EID3
EID2
EID1
EID0
xxxx xxxx
48, 230
RXF6EIDH(7)
EID15
EID14
EID13
EID12
EID11
EID10
EID9
EID8
xxxx xxxx
48, 230
RXF6SIDL(7)
SID2
SID1
SID0
—EXIDEN
—EID17
EID16
xx-x x-xx
48, 230
RXF6SIDH(7)
SID10
SID9
SID8
SID7
SID6
SID5
SID4
SID3
xxxx xxxx
48, 230
RXF5EIDL
EID7
EID6
EID5
EID4
EID3
EID2
EID1
EID0
xxxx xxxx
43, 230
RXF5EIDH
EID15
EID14
EID13
EID12
EID11
EID10
EID9
EID8
xxxx xxxx
43, 230
TABLE 4-3:
REGISTER FILE SUMMARY (CONTINUED)
File Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Details
on page:
Legend:
x
= unknown, u = unchanged, – = unimplemented, q = value depends on condition
Note
1:
RA6 and associated bits are configured as port pins in RCIO and ECIO Oscillator mode only and read ‘0’ in all other oscillator
modes.
2:
Bit 21 of the TBLPTRU allows access to the device configuration bits.
3:
These registers are unused on PIC18F6X80 devices; always maintain these clear.
4:
These bits have multiple functions depending on the CAN module mode selection.
5:
Meaning of this register depends on whether this buffer is configured as transmit or receive.
6:
RG5 is available as an input when MCLR is disabled.
7:
This register reads all ‘0’s until the ECAN module is set up in Mode 1 or Mode 2.



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