M68ICS08GR datasheet(178/408 Pages) FREESCALE

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Keyboard Interrupt (KBI)

Technical Data

MC68HC908GR8 — Rev 4.0

178

Keyboard Interrupt (KBI)

MOTOROLA

If the MODEK bit is set, the keyboard interrupt pins are both falling edge-

and low-level sensitive, and both of the following actions must occur to

clear a keyboard interrupt request:

•

Vector fetch or software clear — A vector fetch generates an

interrupt acknowledge signal to clear the interrupt request.

Software may generate the interrupt acknowledge signal by

writing a logic 1 to the ACKK bit in the keyboard status and control

poll the keyboard interrupt pins and require software to clear the

keyboard interrupt request. Writing to the ACKK bit prior to leaving

an interrupt service routine can also prevent spurious interrupts

due to noise. Setting ACKK does not affect subsequent transitions

on the keyboard interrupt pins. A falling edge that occurs after

writing to the ACKK bit latches another interrupt request. If the

keyboard interrupt mask bit, IMASKK, is clear, the CPU loads the

program counter with the vector address at locations $FFDE and

$FFDF.

•

Return of all enabled keyboard interrupt pins to logic 1 — As long

as any enabled keyboard interrupt pin is at logic 0, the keyboard

interrupt remains set.

The vector fetch or software clear and the return of all enabled keyboard

interrupt pins to logic 1 may occur in any order.

If the MODEK bit is clear, the keyboard interrupt pin is falling-edge-

sensitive only. With MODEK clear, a vector fetch or software clear

immediately clears the keyboard interrupt request.

Reset clears the keyboard interrupt request and the MODEK bit, clearing

the interrupt request even if a keyboard interrupt pin stays at logic 0.

The keyboard flag bit (KEYF) in the keyboard status and control register

can be used to see if a pending interrupt exists. The KEYF bit is not

affected by the keyboard interrupt mask bit (IMASKK) which makes it

useful in applications where polling is preferred.

To determine the logic level on a keyboard interrupt pin, use the data

direction register to configure the pin as an input and read the data

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