AD9508PCBZ datasheet(26/40 Pages) AD

26 / 40 page

AD9508

Data Sheet

Rev. A | Page 26 of 40

SERIAL CONTROL PORT

The AD9508 serial control port is a flexible, synchronous serial

communications port that provides a convenient interface to

many industry-standard microcontrollers and microprocessors.

The serial control port is compatible with most synchronous

transfer formats, including I²C, Motorola SPI, and Intel SSR

protocols. The serial control port allows read/write access to the

AD9508 register map.

In SPI mode, single- or multiple-byte transfers are supported.

The SPI port configuration is programmable via Register 0x00.

This register is integrated into the SPI control logic rather than

in the register map and it is distinct from the I2C Register 0x00.

SPI/I²C PORT SELECTION

The AD9508 has two serial interfaces, SPI and I²C. Users can

select either SPI or I²C depending on the state of the PROG_SEL

pin. In I²C operation, four different I²C slave address (seven bits

wide) settings are available, see Table 16. The five MSBs of the

slave address are hardware coded as 11011 and Pin S4 and Pin

S5 program the two LSBs.

Table 16. Serial Port Mode Selection

Address

Low

I²C, 1101100

Low

High

I²C, 1101101

High

Low

I²C, 1101110

High

I²C, 1101111

SPI SERIAL PORT OPERATION

Pin Descriptions

The SCLK (serial clock) pin serves as the serial shift clock. This

pin is an input. SCLK synchronizes serial control port read and

write operations. The rising edge SCLK registers write data bits,

and the falling edge registers read data bits. The SCLK pin

supports a maximum clock rate of 40 MHz.

The SDIO (serial data input/output) pin is a dual-purpose pin

and acts either as an input only (unidirectional mode) or as both

an input and an output (bidirectional mode). The AD9508

default SPI mode is bidirectional.

The SDO (serial data output) pin is useful only in unidirectional

I/O mode. It serves as the data output pin for read operations.

The

(chip select) pin is an active low control that gates read

and write operations. This pin is internally connected to a 30 kΩ

pull-up resistor. When

CSEE

is high, the SDO and SDIO pins enter

a high impedance state.

SPI Mode Operation

The SPI port supports both 3-wire (bidirectional) and 4-wire

(unidirectional) hardware configurations and both MSB first

and LSB first data formats. Both the hardware configuration

and data format features are programmable. By default, the

AD9508 uses the bidirectional MSB first mode. The reason that

bidirectional is the default mode is so that the user can continue

to write to the device (if it is wired for unidirectional operation)

to switch to unidirectional mode.

Assertion (active low) of the

CSEE

pin initiates a write or read

operation to the AD9508 SPI port. For data transfers of three

bytes or fewer (excluding the instruction word), the device

supports the

CSEE

stalled high mode. In this mode, the

CSEE

pin can

be temporarily deasserted on any byte boundary, allowing time

for the system controller to process the next byte. However,

CSEE

can be deasserted on byte boundaries only; this applies to both

the instruction and data portions of the transfer.

During stall high periods, the serial control port state machine

enters a wait state until all data is sent. If the system controller

decides to abort a transfer midstream, the state machine must be

reset either by completing the transfer or by asserting the

CSEE

pin for at least one complete SCLK cycle (but less than eight

SCLK cycles). Deasserting the

CSEE

pin on a nonbyte boundary

terminates the serial transfer and flushes the buffer.

In streaming mode (see Table 17), any number of data bytes can

be transferred in a continuous stream. The register address is

automatically incremented or decremented.

CSEE

must be deasserted

at the end of the last byte that is transferred, thereby ending the

stream mode.

Table 17. Byte Transfer Count

Bytes to Transfer

Streaming mode

Communication Cycle—Instruction Plus Data

The SPI protocol consists of a two part communication cycle.

The first part is a 16-bit instruction word that is coincident with

the first 16 SCLK rising edges and a payload. The instruction

word provides the AD9508 serial control port with information

regarding the payload. The instruction word includes the R/

WEE

bit that indicates the direction of the payload transfer; that is, a

read or write operation. The instruction word also indicates the

number of bytes in the payload and the starting register address

of the first payload byte.

AD9508PCBZ датащи(PDF) 26 Page - Analog Devices

AD9508PCBZ датащи(HTML) 26 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

датащи скачать

ссылки URL