| поискавой системы для электроныых деталей |
|
AD9508PCBZ датащи(PDF) 12 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD9508PCBZ датащи(HTML) 12 Page - Analog Devices |
|
12 / 40 page ![]() AD9508 Data Sheet Rev. A | Page 12 of 40 Pin No. Mnemonic Description 18 A RESETE CMOS Input. Device Reset. When this active low pin is asserted, the internal register settings enter their default state after the A RESETE A is released. Note that A RESETE A also serves as a power-down of the device while an active low signal is applied to the pin. The A RESETE A pin has an internal 24 kΩ pull-up resistor. 19 SCLK/SCL/S0 Serial Programming Clock/Data Clock/Programming Pin. Multipurpose pin controlled by the PROG_SEL pin used for serial programming clock (SCLK) in SPI mode or data clock (SCL) for serial programming in I2C Mode. The PROG_SEL pin determines which programming mode is used. In pin programming mode, this pin becomes S0. In this mode, S0 is hardwired with a resistor to either VDD or ground. The resistor value and resistor biasing determine the channel divider values for the outputs on Pin 2 and Pin 3. See the Pin Strapping to Program on Power-Up section for more details. 20 A SYNCE Clock Synchronization. When this pin is active low, the output drivers are held static and then synchronized on a low-to-high transition of this pin. The A SYNCE A pin has an internal 24 kΩ pull-up resistor. 21 CLK Differential Clock Input or Single-Ended CMOS Input. Whether this pin serves as the differential clock input or the single-ended CMOS input depends on the logic state of the IN_SEL pin. 22 A CLKE Complementary Differential Clock Input. 23 IN_SEL CMOS Input. A logic high configures the CLK and A CLKE A inputs for a differential input signal. A logic low configures the input for single-ended CMOS applied to the CLK pin. AC-couple the unused A CLKE A to ground with a 0.1 μF capacitor. 24 SDIO/SDA/S1 Serial Data Input and Output (SPI)/Serial Data (I2C)/Pin Programming. Pin 24 is a multipurpose input controlled by the PROG_SEL pin used for SPI (SDIO), I2C (SDA), and pin strapping modes (S1). When the device is in 4-wire SPI mode, data is written via SDIO. In 3-wire mode, both data reads and writes occur on this pin. There is no internal pull-up/pull-down resistor on this pin. In I2C mode, SDA serves as the serial data pin. The PROG_SEL pin determines which programming mode is used. In pin programming mode, this pin becomes S1. In this mode, S1 is hardwired with a resistor to either VDD or ground. The resistor value and resistor biasing determine the channel divider values for the outputs on Pin 7 and Pin 8. See the Pin Strapping to Program on Power-Up section for more details. EP Exposed Pad. The exposed die pad must be connected to ground (VSS). |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |