AD9508PCBZ datasheet(5/40 Pages) AD

5 / 40 page

Data Sheet

AD9508

Rev. A | Page 5 of 40

Parameter

Symbol

Min

Typ

Max

Unit

Test Conditions/Comments

CMOS CLOCK OUTPUTS

Single-ended; termination = open; OUTx

and OUTx in phase

Output Frequency

250

MHz

With 10 pF load per output, see Figure 14

for swing vs. frequency

Output Voltage

@ 1 mA Load

High

VOH

1.7

Low

VOL

0.1

@ 10 mA load

High

VOH

1.2

Low

VOL

0.6

@ 10 mA Load (2 × CMOS Mode)

High

VOH

1.45

Low

VOL

0.35

CMOS Duty Cycle

Up to 250 MHz

OUTPUT DRIVER TIMING CHARACTERISTICS

Table 3.

Parameter

Symbol

Min

Typ

Max

Unit

Test Conditions/Comments

LVDS OUTPUTS

Termination = 100 Ω differential, 1 × LVDS

Output Rise/Fall Time

tR, tF

152

177

20% to 80% measured differentially

Propagation Delay, Clock-to-LVDS Output

tPD

1.56

2.01

2.43

Temperature Coefficient

2.8

ps/°C

Output Skew1

All LVDS Outputs

On the Same Part

Across Multiple Parts

781

Assumes same temperature and supply;

takes into account worst-case propaga-

tion delay delta due to worst-case

process variation

HSTL OUTPUTS

Termination = 100 Ω differential, 1 × HSTL

Output Rise/Fall Time

tR, tF

118

143

20% to 80% measured differentially

Propagation Delay, Clock-to-HSTL Output

tPD

1.59

2.05

2.5

Temperature Coefficient

2.9

ps/°C

Output Skew1

All HSTL Outputs

On the Same Part

Across Multiple Parts

825

Assumes same temperature and supply;

takes into account worst-case propaga-

tion delay delta due to worst-case

process variation

CMOS OUTPUTS

Output Rise/Fall Time

tR, tF

1.18

1.45

20% to 80%; CLOAD = 10 pF

Propagation Delay, Clock-to-CMOS Output

tPD

2.04

2.56

3.07

10 pF load

Temperature Coefficient

3.3

ps/°C

Output Skew1

All CMOS Outputs

On the Same Part

112

Across Multiple Parts

965

Assumes same temperature and supply;

takes into account worst-case

propagation delay delta due to worst-

case process variation

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