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AD9508PCBZ датащи(PDF) 11 Page - Analog Devices

номер детали AD9508PCBZ
подробное описание детали  1.65 GHz Clock Fanout Buffer with Output Dividers and Delay Adjust
PDF  40 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
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AD9508PCBZ датащи(HTML) 11 Page - Analog Devices

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Data Sheet
AD9508
Rev. A | Page 11 of 40
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Figure 2. Pin Configuration
Table 12. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
CS/S2
Chip Select/Pin Programming. Multipurpose pin. This pin is controlled by the PROG_SEL pin. Chip
Select (CS) is an active logic low CMOS input used in the SPI operation mode. When programming a
device via SPI mode, CS must be held low. In systems where more than one AD9508 is present, this pin
enables individual programming of each AD9508. In pin programming mode, this pin becomes S2. In
this mode, S2 is hard wired with a resistor to either VDD or ground. The resistor value and resistor
biasing determine the channel divider value for the outputs on Pin 11 and Pin 12. See the Pin Strapping
to Program on Power-Up section for more details.
2
OUT0
LVDS/HSTL Differential Output or Single-Ended CMOS Output.
3
OUT0
Complementary LVDS/HSTL Differential Output or Single-Ended CMOS Output.
4
SDO/S3
Serial Data Output/Pin Programming. Multipurpose pin. This pin is controlled by the PROG_SEL pin.
SDO is configured as an output to read back the internal register settings in SPI mode operation. In pin
programming mode, this pin becomes S3, which is hard wired with a resistor to either VDD or ground.
The resistor value and resistor biasing determine the channel divider value for the outputs on Pin 16
and Pin 17. See the Pin Strapping to Program on Power-Up section for more details.
5
EXT_CAP0
Node for External Decoupling Capacitor for LDO. Tie this pin to a 0.47 μF capacitor to ground.
6
VDD
Power Supply (2.5 V or 3.3 V Operation).
7
OUT1
LVDS/HSTL Differential Output or Single-Ended CMOS Output.
8
OUT1
Complementary LVDS/HSTL Differential Output or Single-Ended CMOS Output.
9
S4
Pin Programming. Use this pin in pin programming mode only. The PROG_SEL pin determines which
programming mode is used. In pin programming mode, S4 is hardwired with a resistor to either VDD or
ground. The resistor value and resistor biasing determine the output logic levels used for the outputs
on Pin 2, Pin 3, Pin 7, and Pin 8. See the Pin Strapping to Program on Power-Up section for more details.
10
S5
Pin Programming. Use this pin in pin programming mode only. The PROG_SEL pin determines which
programming mode is used. In pin programming mode, S5 is hardwired with a resistor to either VDD or
ground. The resistor value and resistor biasing determine the output logic levels used for the outputs
on Pin 11, Pin 12, Pin 16, and Pin 17. See the Pin Strapping to Program on Power-Up section for more
details.
11
OUT2
LVDS/HSTL Differential Output or Single-Ended CMOS Output.
12
OUT2
Complementary LVDS/HSTL Differential Output or Single-Ended CMOS Output.
13
VDD
Power Supply (2.5 V or 3.3 V Operation).
14
EXT_CAP1
Node for External Decoupling Capacitor for LDO. Tie this pin to a 0.47 μF capacitor to ground.
15
PROG_SEL
Three-State CMOS Input. Pin 15 selects the type of device programming interface to be used (SPI, I2C,
or pin programming).
16
OUT3
LVDS/HSTL Differential Output or Single-Ended CMOS Output.
17
OUT3
Complementary LVDS/HSTL Differential Output or Single-Ended CMOS Output.
2
1
3
4
5
6
18
17
16
15
14
13
VDD
EXT_CAP0
SDO/S3
OUT0
OUT0
CS/S2
VDD
NOTES
1. THE EXPOSED DIE PAD MUST BE CONNECTED
TO GROUND (VSS).
EXT_CAP1
PROG_SEL
OUT3
OUT3
RESET
AD9508
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