AD9508PCBZ datasheet(20/40 Pages) AD

20 / 40 page

AD9508

Data Sheet

Rev. A | Page 20 of 40

TERMINOLOGY

Phase Jitter and Phase Noise

An ideal sine wave can be thought of as having a continuous

and an even progression phase with time from 0 degrees to

360 degrees for each cycle. Actual signals, however, display a

certain amount of variation from ideal phase progression over

time. This phenomenon is phase jitter. Although many causes

can contribute to phase jitter, one major cause is random noise,

characterized statistically as being Gaussian (normal) in

distribution.

Phase jitter leads to a spreading out of the energy of the sine wave

in the frequency domain, producing a continuous power spec-

trum. This power spectrum is usually reported as a series of

values whose units are dBc/Hz at a given offset in frequency

from the sine wave (carrier). The value is a ratio (expressed in

dB) of the power contained within a 1 Hz bandwidth with respect

to the power at the carrier frequency. For each measurement,

the offset from the carrier frequency is also given.

It is meaningful to integrate the total power contained within

some interval of offset frequencies (for example, 10 kHz to

10 MHz). This is called the integrated phase noise over that

frequency offset interval and can be readily related to the time

jitter due to the phase noise contained within that offset frequency

interval.

Phase noise has a detrimental effect on the performance of

ADCs, DACs, and RF mixers. It lowers the achievable dynamic

range of the converters and mixers, although they are affected

in somewhat different ways.

Time Jitter

Phase noise is a frequency domain phenomenon. In the time

domain, the same effect is exhibited as with time jitter. When

observing a sine wave, the time of successive zero crossings

varies. In a square wave, the time jitter is a displacement of the

edges from their ideal (regular) times of occurrence. In both

cases, the variations in timing from the ideal are the time jitter.

Because these variations are random in nature, the time jitter is

specified in units of seconds root mean square (rms) or one

sigma of the Gaussian distribution.

Time jitter that occurs on a sampling clock for a DAC or an

ADC decreases the SNR and dynamic range of the converter.

A sampling clock with the lowest possible jitter provides the

highest performance from a given converter.

Additive Phase Noise

Additive phase noise is the amount of phase noise that is

attributable only to the device or subsystem being measured.

The residual phase noise system makes use of two devices

operating in perfect quadrature. The correlated noise of any

external components common to both devices (such as clock

sources) is not present. This makes it possible to predict the

degree to which the device is going to affect the total system

phase noise when used in conjunction with the various oscillators

and clock sources, each of which contribute their own phase

noise to the total. In many cases, the phase noise of one element

dominates the system phase noise.

Additive Time Jitter

Additive time jitter refers to the amount of time jitter that is

attributable to the device or subsystem being measured. It is

calculated by integrating the additive phase noise over a specific

range. This makes it possible to predict the degree to which the

device is going to impact the total system time jitter when used

in conjunction with the various oscillators and clock sources,

each of which contribute their own time jitter to the total. In

many cases, the time jitter of the external oscillators and clock

sources dominates the system time jitter.

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