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WM8985GEFL/R датащи(PDF) 28 Page - Wolfson Microelectronics plc

номер детали WM8985GEFL/R
подробное описание детали  Multimedia CODEC with Class D Headphone and Line Out
PDF  121 Pages
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производитель  WOLFSON [Wolfson Microelectronics plc]
домашняя страница  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8985GEFL/R датащи(HTML) 28 Page - Wolfson Microelectronics plc

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WM8985
Production Data
w
PD, Rev 4.6, July 2009
28
OUT3 and OUT4 can be configured to provide an additional stereo or mono differential lineout from
the output of the DACs, the mixers or the input microphone boost stages. They can also provide a
midrail reference for pseudo differential inputs to external amplifiers.
AUDIO INTERFACES
The WM8985 has a standard audio interface, to support the transmission of stereo data to and from
the chip. This interface is a 3 wire standard audio interface which supports a number of audio data
formats including:
I
2S
DSP/PCM Mode (a burst mode in which LRC sync plus 2 data packed words are
transmitted)
MSB-First, left justified
MSB-First, right justified
The interface can operate in master or slave modes.
CONTROL INTERFACES
To allow full software control over all features, the WM8985 offers a choice of 2 or 3 wire control
interface. It is fully compatible and an ideal partner for a wide range of industry standard
microprocessors, controllers and DSPs.
Selection of the mode is via the MODE pin. In 2 wire mode, the address of the device is fixed as
0011010.
CLOCKING SCHEMES
WM8985 offers the normal audio DAC clocking scheme operation, where 256fs MCLK is provided to
the DAC and ADC. A flexible clock divider allows the 256fs DAC clock to be generated from a range
of input clock frequencies, for example, 256fs, 384fs, 512fs and 768fs.
A PLL is included which may be used to generate these clocks in the event that they are not
available from the system controller. This PLL can accept a range of common input clock
frequencies between 8MHz and 50MHz to generate high quality audio clocks. If this PLL is not
required for generation of these clocks, it can be reconfigured to generate alternative clocks which
may then be output on the GPIO1 pin and used elsewhere in the system; available in 2-wire control
mode only.
POWER CONTROL
The design of the WM8985 has given much attention to power consumption without compromising
performance. The WM8985 operates at low analog and digital supply voltages, and includes the
ability to power off any unused parts of the circuitry under software control. It also includes standby
and power off modes.
INPUT SIGNAL PATH
The WM8985 has a number of flexible analogue inputs. There are two input channels, Left and
Right, each of which consists of an input PGA stage followed by a boost/mix stage which drives into
the hi-fi ADC. Each input path has three input pins which can be configured in a variety of ways to
accommodate single-ended, pseudo-differential or dual differential microphones. There are two
auxiliary input pins which can be fed into to the input boost/mix stage as well as driving into the
output path. A bypass path exists from the output of the boost/mix stage into the output left/right
mixers.
MICROPHONE INPUTS
The WM8985 can accommodate a variety of microphone configurations including single ended and
pseudo-differential inputs. The inputs to the left differential input PGA are LIN, LIP and L2. The
inputs to the right differential input PGA are RIN, RIP and R2.
In single-ended microphone input configuration the microphone signal should be input to LIN or RIN
and the non-inverting input of the input PGA clamped to VMID.



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