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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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WM8985GEFL/R датащи(PDF) 98 Page - Wolfson Microelectronics plc |
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WM8985GEFL/R датащи(HTML) 98 Page - Wolfson Microelectronics plc |
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98 / 121 page  WM8985 Production Data w PD, Rev 4.6, July 2009 98 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO 6 GPIO1GPD 0 GPIO1 Internal pull-down enable: 0 = Internal pull-down disabled 1 = Internal pull-down enabled General Purpose Input/Output (GPIO) 3 GPIO1POL 0 GPIO1 Polarity invert 0=Non inverted 1=Inverted General Purpose Input/Output (GPIO) 2:0 GPIO1SEL [2:0] 000 CSB/GPIO1 pin function select: 000= input (CSB/jack detection: depending on MODE setting) 001= reserved 010=Temp ok 011=Amute active 100=PLL clk o/p 101=PLL lock 110=logic 1 111=logic 0 General Purpose Input/Output (GPIO) 9 (09h) 8:7 00 Reserved. Initialise to 00 6 JD_EN 0 Jack Detection Enable 0=disabled 1=enabled Output Switching (Jack Detect) 5:4 JD_SEL 00 Pin selected as jack detection input 00 = GPIO1 01 = GPIO2 10 = GPIO3 11 = Reserved Output Switching (Jack Detect) 3:0 0 Reserved. Initialise to 0 10 (0Ah) 8:7 00 Reserved. Initialise to 0 6 SOFTMUTE 0 Softmute enable: 0=Disabled 1=Enabled Output Signal Path 5:4 00 Reserved. Initialise to 0 3 DACOSR128 0 DAC oversample rate select 0 = 64x (lowest power) 1 = 128x (best SNR) Power Management 2 AMUTE 0 Automute enable 0 = Amute disabled 1 = Amute enabled Output Signal Path 1 DACPOLR 0 Right DAC output polarity: 0 = non-inverted 1 = inverted (180 degrees phase shift) Output Signal Path 0 DACPOLL 0 Left DAC output polarity: 0 = non-inverted 1 = inverted (180 degrees phase shift) Output Signal Path 11 (0Bh) 8 DACVU N/A DAC left and DAC right volume do not update until a 1 is written to DACVU (in reg 11 or 12) Digital to Analogue Converter (DAC) |
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