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WM8945ECS/R датащи(PDF) 131 Page - Wolfson Microelectronics plc |
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WM8945ECS/R датащи(HTML) 131 Page - Wolfson Microelectronics plc |
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131 / 169 page ![]() Production Data WM8945 w PD, May 2011, Rev 4.1 131 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO R33 (21h) DRC Control 5 13 DRC_KNEE2_ OP_ENA 0 DRC_KNEE2_OP Enable 0 = Disabled 1 = Enabled 12:8 DRC_KNEE2_ OP[4:0] 0_0000 Output signal at the Noise Gate threshold ‘Knee2’. 00000 = -30dB 00001 = -31.5dB 00010 = -33dB … (-1.5dB steps) 11110 = -75dB 11111 = -76.5dB Only applicable when DRC_KNEE2_OP_ENA = 1. 7:3 DRC_KNEE_O P[4:0] 0_0000 Output signal at the Compressor ‘Knee1’. 00000 = 0dB 00001 = -0.75dB 00010 = -1.5dB … (-0.75dB steps) 11110 = -22.5dB 11111 = Reserved 2:0 DRC_HI_COM P[2:0] 011 Compressor slope (upper region) 000 = 1 (no compression) 001 = 1/2 010 = 1/4 011 = 1/8 100 = 1/16 101 = 0 110 = Reserved 111 = Reserved Register 21h DRC Control 5 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO R34 (22h) DRC Control 6 3:2 DRC_QR_THR [1:0] 00 DRC Quick-release threshold (crest factor in dB) 00 = 12dB 01 = 18dB 10 = 24dB 11 = 30dB 1:0 DRC_QR_DCY [1:0] 00 DRC Quick-release decay rate (seconds/6dB) 00 = 0.725ms 01 = 1.45ms 10 = 5.8ms 11 = reserved Register 22h DRC Control 6 |
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