LPC810M021FN8 datasheet(76/313 Pages) NXP

76 / 313 page

UM10601

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Preliminary user manual

Rev. 1.0 — 7 November 2012

76 of 313

7.1 How to read this chapter

All GPIO registers refer to 32 pins per port. Depending on the package type, not all pins

are available, and the corresponding bits in the GPIO registers are reserved (see

Table 67).

7.2 Features

• GPIO port registers are located on the ARM Cortex M0+ I/O port for fast access.

• The ARM Cortex M0+ I/O port supports single-cycle access.

• GPIO ports

–

GPIO pins can be configured as input or output by software.

–

All GPIO pins default to inputs with interrupt disabled at reset.

–

Pin interrupt registers allow pins to be sensed and set individually.

7.3 Basic configuration

For the GPIO port registers, enable the clock to the GPIO port registers in the

SYSAHBCLKCTRL register (Table 18, bit 6).

7.4 Pin description

All GPIO functions are fixed-pin functions. The switch matrix assigns every GPIO port pin

to one and only one pin on the LPC800 package. By default, the switch matrix connects all

package pins except supply and ground pins to their GPIO port pins.

The pin description table (see the LPC81xM data sheet) shows how the GPIO port pins

are assigned to LPC800 package pins.

7.5 General description

The GPIO port registers can be used to configure each GPIO pin as input or output and

read the state of each pin if the pin is configured as input or set the state of each pin if the

pin is configured as output.

UM10601

Chapter 7: LPC800 GPIO port

Rev. 1.0 — 7 November 2012

Preliminary user manual

Table 67.

GPIO pins available

Package

GPIO Port 0

TSSOP16

PIO0_0 to PIO0_13

TSSOP20

PIO0_0 to PIO0_17

SOP20

PIO0_0 to PIO0_17

DIP8

PIO0_0 to PIO0_5

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