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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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DAC5687MPZPEP датащи(PDF) 54 Page - Texas Instruments |
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DAC5687MPZPEP датащи(HTML) 54 Page - Texas Instruments |
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54 / 75 page  www.ti.com Digital Inputs DA[15:0] DB[15:0] SLEEP PHSTR TxENABLE QFLAG SDIO SCLK SDENB Internal Digital In IOVDD IOGND RESETB Internal Digital In IOVDD IOGND Clock Inputs CLK Internal Digital In CLKC CLKGND R1 10 k Ω CLKVDD R1 10 k Ω R2 10 k Ω R2 10 k Ω CLKVDD CLKVDD S0028-01 DAC5687-EP SGLS333 – JUNE 2006 QOUT(t) = (IIN(t)sin(2π× 0 × t + π/4) + 0 × cos(2π× 0 × t + π/4)) × 2 (1 – 1) = I IN(t)sin(π/4) = IIN(t)/2 ½ Applying the QMC gain of 1446, equivalent to 2½, increases the signal back to unity gain through the FMIX and the QMC blocks. Note that with this termination, the DAC side of the transformer is not 50- Ω terminated and, therefore, may result in reflections when used with a cable output. Figure 61 shows a schematic of the equivalent CMOS digital inputs of the DAC5687. DA[0..15], DB[0..15], SLEEP, PHSTR, TXENABLE, QFLAG, SDIO, SCLK, and SDENB have pulldown resistors and RESETB has a pullup resistor internal to the DAC5687. See the specification table for logic thresholds. Figure 61. CMOS/TTL Digital Equivalent Input Figure 62 shows an equivalent circuit for the clock input. Figure 62. Clock Input Equivalent Circuit Figure 63, Figure 64, and Figure 65 show various input configurations for driving the differential clock input (CLK/CLKC). 54 Submit Documentation Feedback |
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