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DAC5687MPZPEP датащи(PDF) 38 Page - Texas Instruments

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номер детали DAC5687MPZPEP
подробное описание детали  16-BIT 500-MSPS 2쨈??쨈 INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER (DAC)
PDF  75 Pages
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производитель  TI1 [Texas Instruments]
домашняя страница  http://www.ti.com
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DAC5687MPZPEP датащи(HTML) 38 Page - Texas Instruments

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Fine Mixer (FMIX)
Frequency
Register
32
Accumulator
32
RESET
CLK
PHSTR
32
32
Phase
Register
16
16
16
Look-Up
Table
sin
cos
Σ
Σ
16
16
fDAC
B0026-01
f
NCO +
freq
f
NCO_CLK
232
for freq
v 231
f
NCO +
(freq * 232)
f
NCO_CLK
232
for freq
u 231
Coarse Mixer (CMIX)
DAC5687-EP
SGLS333 – JUNE 2006
The fine mixer block FMIX uses a numerically controlled oscillator (NCO) with a 32-bit frequency register
freq(31:0) and a 16-bit phase register phase(15:0) to provide sin and cos for mixing. The NCO tuning frequency
is programmed in registers 0x09 through 0x0C. Phase offset is programmed in registers 0xD and 0xE. A block
diagram of the NCO is shown in Figure 40.
Figure 40. Block Diagram of the NCO
Synchronization of the NCO occurs by resetting the NCO accumulator to zero with assertion of PHSTR. See the
Fine Mixer Synchronization section below. Frequency word freq in the frequency register is added to the
accumulator every clock cycle. The output frequency of the NCO is
where fNCO_CLK is the clock frequency of the NCO circuit. In X4 mode, the NCO clock frequency is the same as
the DAC sample rate fDAC. The maximum clock frequency the NCO can operate at is 320 MHz – in X4 FMIX
mode, where FMIX operates at the DAC update rate, the DAC updated rate will be limited to 320 MSPS. In X2,
X4L and X8 modes, the NCO circuit is followed by a further 2
× interpolation and so f
NCO_CLK = fDAC/2 and
operates at fDAC = 500 MHz.
Treating channels A and B as a complex vector I + I
× Q where I(t) = A(t) and Q(t) = B(t), the output of FMIX
IOUT(t) and QOUT(t) is:
IOUT(t) = (IIN(t)cos(2πfNCOt + δ) – QIN(t)sin(2πfNCOt + δ)) × 2
(NCO_GAIN – 1)
QOUT(t) = (IIN(t)sin(2πfNCOt + δ) + QIN(t)cos(2πfNCOt + δ)) × 2
(NCO_GAIN – 1)
Where t is the time since the last resetting of the NCO accumulator,
δ is the initial accumulator value and
NCO_GAIN, bit 6 in register CONFIG2, is either 0 or 1.
δ is given by:
δ = 2π×phase/216.
The maximum output amplitude of FMIX occurs if IIN(t) and QIN(t) are simultaneously full scale amplitude and the
sine and cosine arguments 2
πf
NCOt + δ = (2N – 1) ×π /4 (N = 1, 2, ...). With NCO_GAIN = 0, the gain through
FMIX is sqrt(2)/2 or –3 dB. This loss in signal power is in most cases undesirable, and it is recommended that
the gain function of the QMC block be used to increase the signal by 3 dB to 0 dBFS by setting qmca_gain and
qmcb_gain each to 1446 (decimal).
With NCO_GAIN = 1, the gain through FMIX is sqrt(2) or +3 dB, which can cause clipping of the signal if IIN(t)
and QIN(t) are simultaneously near full scale amplitude and should therefore be used with caution.
The coarse mixer block provides mixing capability at the DAC output rate with fixed frequencies of FS/2 or FS/4.
The coarse mixer output phase sequence is selected by the cm_mode(3:0) bits in register CONFIG2 and is
shown in Table 10.
38
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