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R5F10RB8AFP датащи(PDF) 28 Page - Renesas Technology Corp |
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R5F10RB8AFP датащи(HTML) 28 Page - Renesas Technology Corp |
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28 / 76 page ![]() RL78/L12 2. ELECTRICAL SPECIFICATIONS (TARGET) Page 28 of 73 R01DS0157EJ0001 Rev.0.01 2012.02.20 Under development Preliminary document Specifications in this document are tentative and subject to change. Caution The pins mounted depend on the product. Refer to 1.3.1 32-pin products to 1.3.5 64-pin products. (TA = −40 to +85°C, 1.6 V ≤ EVDD = VDD ≤ 5.5 V, VSS = EVSS = 0 V) Items Symbol Conditions MIN. TYP. MAX. Unit ILIH1 P10 to P17, P30 to P32, P40 to P43, P50 to P54, P60, P61, P70 to P74, P120, P125 to P127, P140 to P147 VI = EVDD 1 μA ILIH2 P20, P21, P137, RESET VI = VDD 1 μA In input port or external clock input 1 μA Input leakage current, high ILIH3 P121 to P124 (X1, X2, XT1, XT2, EXCLK, EXCLKS) VI = VDD In resonator connection 10 μA ILIL1 P10 to P17, P30 to P32, P40 to P43, P50 to P54, P60, P61, P70 to P74, P120, P125 to P127, P140 to P147 VI = EVSS −1 μA ILIL2 P20, P21, P137, RESET VI = VSS −1 μA In input port or external clock input −1 μA Input leakage current, low ILIL3 P121 to P124 (X1, X2, XT1, XT2, EXCLK, EXCLKS) VI = VSS In resonator connection −10 μA On-chip pll-up resistance RU P10 to P17, P30 to P32, P40 to P43, P50 to P54, P70 to P74, P120, P125 to P127, P140 to P147 VI = EVSS, In input port 10 20 100 k Ω Remark Unless specified otherwise, the characteristics of alternate-function pins are the same as those of the port pins. |
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