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R5F10RB8AFP датащи(PDF) 63 Page - Renesas Technology Corp

номер детали R5F10RB8AFP
подробное описание детали  Integrated LCD controller/driver, True Low Power Platform (as low as 75 關A/MHz, and 0.64 關A for RTC LVD), 1.6 V to 5.5 V operation, 8 to 32 Kbyte Flash, 31 DMIPS at 24 MHz, for All LCD Based Applications
PDF  76 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F10RB8AFP датащи(HTML) 63 Page - Renesas Technology Corp

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RL78/L12
2. ELECTRICAL SPECIFICATIONS (TARGET)
Page 63 of 73
R01DS0157EJ0001 Rev.0.01
2012.02.20
Under development
Preliminary document
Specifications in this document are tentative and subject to change.
Caution
The pins mounted depend on the product.
Refer to 1.3.1
32-pin products to 1.3.5
64-pin
products.
(2) 1/4 bias method
(TA =
−40 to +85°C, 1.8 V ≤ VDD ≤ 5.5 V, VSS = 0 V)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
VLCD = 02H
T.B.D.
0.90
T.B.D.
V
VLCD = 03H
T.B.D.
0.95
T.B.D.
V
VLCD = 04H
T.B.D.
1.00
T.B.D.
V
VLCD = 05H
T.B.D.
1.05
T.B.D.
V
VLCD = 06H
T.B.D.
1.10
T.B.D.
V
VLCD = 07H
T.B.D.
1.15
T.B.D.
V
VLCD = 08H
T.B.D.
1.20
T.B.D.
V
VLCD = 09H
T.B.D.
1.25
T.B.D.
V
VLCD = 0AH
T.B.D.
1.30
T.B.D.
V
VLCD = 0BH
T.B.D.
1.35
T.B.D.
V
VLCD = 0CH
T.B.D.
1.40
T.B.D.
V
VLCD = 0DH
T.B.D.
1.45
T.B.D.
V
VLCD = 0EH
T.B.D.
1.50
T.B.D.
V
VLCD = 0FH
T.B.D.
1.55
T.B.D.
V
VLCD = 10H
T.B.D.
1.60
T.B.D.
V
VLCD = 11H
T.B.D.
1.65
T.B.D.
V
VLCD = 12H
T.B.D.
1.70
T.B.D.
V
LCD output voltage variation range
VL1
C1 to C5
Note 1
= 0.47
μFNote 2
VLCD = 13H
T.B.D.
1.75
T.B.D.
V
Doubler output voltage
VL2
C1 to C5
Note 1 = 0.47
μF
2 VL1
−0.08
2 VL1
2 VL1
V
Tripler output voltage
VL3
C1 to C5
Note 1 = 0.47
μF
3 VL1
−0.12
3 VL1
3 VL1
V
Quadruply output voltage
VL4
C1 to C5
Note 1 = 0.47
μF
4 VL1
−0.16
4 VL1
4 VL1
V
Reference voltage setup time
Note 2
tVWAIT1
5
ms
C1 to C5
Note 1 = 0.47
μF
500
ms
Voltage boost wait time
Note 3
tVWAIT2
VDD > VL4
T.B.D.
ms
LCD output resistor
Note 4
(Common)
RODC
IO =
±5
μA
40
k
Ω
LCD output resistor
Note 4
(Segment)
ROCS
IO =
±1
μA
200
k
Ω
Notes 1.
This is a capacitor that is connected between voltage pins used to drive the LCD.
C1: A capacitor connected between CAPH and CAPL
C2: A capacitor connected between VL1 and GND
C3: A capacitor connected between VL2 and GND
C4: A capacitor connected between VL3 and GND
C5: A capacitor connected between VL4 and GND
C1 = C2 = C3 = C4 = C5 = 0.47 pF
±30 %
2. This is the time required to wait from when the reference voltage is specified by using the VLCD register
(or when the internal voltage boosting method is selected [by setting the MDSET1 and MDSET0 bits of
the LCDM0 register to 01B] if the default value reference voltage is used) until voltage boosting starts
(VLCON = 1).
3. This is the wait time from when voltage boosting is started (VLCON = 1) until display is enabled (LCDON
= 1).
4. The output resistor is a resistor connected between one of the VL1, VL2, VL3, VL4 and VSS pins, and either
of the SEG and COM pins.



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