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R5F10RB8AFP датащи(PDF) 64 Page - Renesas Technology Corp

номер детали R5F10RB8AFP
подробное описание детали  Integrated LCD controller/driver, True Low Power Platform (as low as 75 關A/MHz, and 0.64 關A for RTC LVD), 1.6 V to 5.5 V operation, 8 to 32 Kbyte Flash, 31 DMIPS at 24 MHz, for All LCD Based Applications
PDF  76 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F10RB8AFP датащи(HTML) 64 Page - Renesas Technology Corp

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RL78/L12
2. ELECTRICAL SPECIFICATIONS (TARGET)
Page 64 of 73
R01DS0157EJ0001 Rev.0.01
2012.02.20
Under development
Preliminary document
Specifications in this document are tentative and subject to change.
Caution
The pins mounted depend on the product.
Refer to 1.3.1
32-pin products to 1.3.5
64-pin
products.
2.7.3 Capacitor split method
(1) 1/3 bias method
(TA =
−40 to +85°C, 2.2 V ≤ VDD = EVDD ≤ 5.5 V, VSS = EVSS = 0 V)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
VL4 voltage
VL4
C1 to C4 = 0.47
μ FNote 3
VDD
V
VL2 voltage
VL2
C1 to C4 = 0.47
μ FNote 3
2/3 VL4
−0.1
2/3 VL4
2/3 VL4
+0.1
V
VL1 voltage
VL1
C1 to C4 = 0.47
μ FNote 3
1/3 VL4
−0.1
1/3 VL4
1/3 VL4
+0.1
V
Capacitor split wait time
Note 1
tVWAIT
100
ms
LCD output resistor
Note 2
(Common)
RODC
IO =
±5
μA
40
k
Ω
LCD output resistor
Note 2
(Segment)
ROCS
IO =
±1
μA
200
k
Ω
Notes 1.
This is the wait time from when voltage bucking is started (VLCON = 1) until display is enabled (LCDON
= 1).
2. The output resistor is a resistor connected between one of the VL1, VL2, VL3, VL4 and VSS pins, and either
of the SEG and COM pins.
3.
This is a capacitor that is connected between voltage pins used to drive the LCD.
C1: A capacitor connected between CAPH and CAPL
C2: A capacitor connected between VL1 and GND
C3: A capacitor connected between VL2 and GND
C4: A capacitor connected between VL4 and GND
C1 = C2 = C3 = C4 = 0.47 pF
±30 %



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