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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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R5F10RB8AFP датащи(PDF) 36 Page - Renesas Technology Corp |
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R5F10RB8AFP датащи(HTML) 36 Page - Renesas Technology Corp |
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36 / 76 page  RL78/L12 2. ELECTRICAL SPECIFICATIONS (TARGET) Page 36 of 73 R01DS0157EJ0001 Rev.0.01 2012.02.20 Under development Preliminary document Specifications in this document are tentative and subject to change. Caution The pins mounted depend on the product. Refer to 1.3.1 32-pin products to 1.3.5 64-pin products. 2.5 Peripheral Functions Characteristics 2.5.1 Serial array unit (1) During communication at same potential (UART mode) (dedicated baud rate generator output) (TA = −40 to +85°C, 1.6 V ≤ EVDD = VDD ≤ 5.5 V, VSS = EVSS = 0 V) Parameter Symbol Conditions MIN. TYP. MAX. Unit fMCK/6 Note 2 bps Transfer rate Note 1 Theoretical value of the maximum transfer rate fCLK=24MHz, fMCK= fCLK 4.0 Mbps UART mode connection diagram (during communication at same potential) User's device TxDq RxDq Rx Tx RL78/L12 UART mode bit width (during communication at same potential) (reference) Baud rate error tolerance High-/Low-bit width 1/Transfer rate TxDq RxDq Notes 1. Transfer rate in the SNOOZE mode is max. 9600 bps, min. 4800 bps. 2. The following conditions are required for low voltage interface when EVDD<VDD. 2.4 V ≤ EVDD < 2.7 V : MAX. 2.6 Mbps 1.8 V ≤ EVDD < 2.4 V : MAX. 1.3 Mbps 1.6 V ≤ EVDD < 1.8 V : MAX. 0.6 Mbps Caution Select the normal input buffer for the RxDq pin and the normal output mode for the TxDq pin by using port input mode register g (PIMg) and port output mode register g (POMg). Remarks 1. q: UART number (q = 0), g: PIM and POM number (g = 1) 2. fMCK: Serial array unit operation clock frequency (Operation clock to be set by the CKSmn bit of serial mode register mn (SMRmn). m: Unit number, n: Channel number (mn = 00, 01)) |
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