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R5F10RB8AFP датащи(PDF) 10 Page - Renesas Technology Corp

номер детали R5F10RB8AFP
подробное описание детали  Integrated LCD controller/driver, True Low Power Platform (as low as 75 關A/MHz, and 0.64 關A for RTC LVD), 1.6 V to 5.5 V operation, 8 to 32 Kbyte Flash, 31 DMIPS at 24 MHz, for All LCD Based Applications
PDF  76 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F10RB8AFP датащи(HTML) 10 Page - Renesas Technology Corp

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RL78/L12
1. OUTLINE
Page 10 of 73
R01DS0157EJ0001 Rev.0.01
2012.02.20
Under development
Preliminary document
Specifications in this document are tentative and subject to change.
1.5 Block Diagram
1.5.1 32-pin products
ch2
ch3
ch0
ch1
ch4
ch5
ch6
ch7
PORT 2
P20, P21
2
PORT 3
P30
PORT 1
P10 to P17
8
PORT 4
P40
VOLTAGE
REGULATOR
REGC
INTERRUPT
CONTROL
RAM
POWER ON RESET/
VOLTAGE
DETECTOR
POR/LVD
CONTROL
RESET CONTROL
SYSTEM
CONTROL
RESET
X1/P121
X2/EXCLK/P122
HIGH-SPEED
ON-CHIP
OSCILLATOR
ON-CHIP DEBUG
TOOL0/P40
SERIAL ARRAY
UNIT0 (2ch)
UART0
RxD0/P11
TxD0/P12
TIMER ARRAY
UNIT0 (8ch)
TI02/TO02/P17
(TI02/TO02/P12)
2
INTP0/P137
INTP1/P15(INTP1/P10),
INTP2/P16(INTP2/P11)
CSI01
SCK01/P15
SO01/P17
SI01/P16
TO00/P140
TI00/P13
BCD
ADJUSTMENT
SCK00/P10
SO00/P12
SI00/P11
CSI00
VSS
TOOLRxD/P11,
TOOLTxD/P12
VDD
SCLA0/P60
SERIAL
INTERFACE IICA0
SDAA0/P61
MULTIPLIER&
DIVIDER,
MULITIPLY-
ACCUMULATOR
KEY RETURN
3
KR0/P12 to KR2/P10
DIRECT MEMORY
ACCESS CONTROL
PORT 6
P60, P61
2
BUZZER OUTPUT
PCLBUZ0/P140
CLOCK OUTPUT
CONTROL
TI01/TO01/P30
A/D CONVERTER
2
ANI0/P20, ANI1/P21
AVREFP/P20
AVREFM/P21
2
ANI18/P13, ANI19/P14
PORT 13
P137
WINDOW
WATCHDOG
TIMER
LOW-SPEED
ON-CHIP
OSCILLATOR
RL78
CPU
CORE
CODE FLASH MEMORY
DATA FLASH MEMORY
INTERVAL
TIMER
PORT 12
P121, P122
2
P126, P127
2
LCD
CONTROLLER/
DRIVER
COM0 to COM3, COMEXP
13
SEG0, SEG4 to SEG6,
SEG19 to SEG21,
SEG27 to SEG32
5
VL1, VL2, VL4
CAPH
CAPL
RAM SPACE
FOR LCD DATA
TI07/TO07/P10
KR3/P140
PORT 14
P140
REAL-TIME
CLOCK
Remark
Functions in parentheses in the above figure can be assigned via settings in the peripheral I/O
redirection register (PIOR)



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