PIC32MX795F512LT-80ISLASHPF datasheet(252/256 Pages) MICROCHIP

252 / 256 page

PIC32MX5XX/6XX/7XX

DS61156G-page 252

Details ....................................................................... 227

Marking ..................................................................... 225

Parallel Master Port (PMP) ............................................... 149

PIC32 Family USB Interface Diagram............................... 132

Pinout I/O Descriptions (table) ............................................ 32

Power-on Reset (POR)

and On-Chip Voltage Regulator................................ 174

Power-Saving Features..................................................... 163

CPU Halted Methods ................................................ 163

Operation .................................................................. 163

with CPU Running..................................................... 163

Prefetch Cache ................................................................. 127

Program Flash Memory

Wait State Characteristics......................................... 192

Reader Response ............................................................. 254

Real-Time Clock and Calendar (RTCC)............................ 151

Registers

DDPCON (Debug Data Port Control)........................ 176

DEVCFG0 (Device Configuration Word 0 ................. 166

DEVCFG1 (Device Configuration Word 1 ................. 168

DEVCFG2 (Device Configuration Word 2 ................. 170

DEVCFG3 (Device Configuration Word 3 ................. 171

DEVID (Device and Revision ID) .............................. 172

Resets ............................................................................... 119

Revision History ................................................................ 240

Serial Peripheral Interface (SPI) ....................................... 143

Software Simulator (MPLAB SIM)..................................... 181

Special Features ............................................................... 165

Timer1 Module .................................................................. 135

Timer2/3, Timer4/5 Modules ............................................. 137

Timing Diagrams

10-bit Analog-to-Digital Conversion (ASAM = 0, SS-

RC<2:0> = 000) ................................................ 218

10-bit Analog-to-Digital Conversion (CHPS<1:0> = 01,

ASAM = 1, SSRC<2:0> = 111, SAMC<4:0> =

00001)............................................................... 219

CAN I/O..................................................................... 212

EJTAG ...................................................................... 224

External Clock........................................................... 194

I/O Characteristics .................................................... 197

I2Cx Bus Data (Master Mode) .................................. 208

I2Cx Bus Data (Slave Mode) .................................... 210

I2Cx Bus Start/Stop Bits (Master Mode)................... 208

I2Cx Bus Start/Stop Bits (Slave Mode)..................... 210

Input Capture (CAPx) ............................................... 201

OCx/PWM................................................................. 202

Output Compare (OCx)............................................. 202

Parallel Master Port Read......................................... 221

Parallel Master Port Write......................................... 222

Parallel Slave Port .................................................... 220

SPIx Master Mode (CKE = 0) ................................... 203

SPIx Master Mode (CKE = 1) ................................... 204

SPIx Slave Mode (CKE = 0) ..................................... 205

SPIx Slave Mode (CKE = 1) ..................................... 206

Timer1, 2, 3, 4, 5 External Clock .............................. 200

UART Reception....................................................... 148

UART Transmission (8-bit or 9-bit Data) .................. 148

Timing Requirements

CLKO and I/O ........................................................... 197

Timing Specifications

CAN I/O Requirements ............................................. 212

I2Cx Bus Data Requirements (Master Mode)........... 209

I2Cx Bus Data Requirements (Slave Mode)............. 211

Input Capture Requirements..................................... 201

Output Compare Requirements................................ 202

Simple OCx/PWM Mode Requirements ................... 202

SPIx Master Mode (CKE = 0) Requirements............ 203

SPIx Master Mode (CKE = 1) Requirements............ 204

SPIx Slave Mode (CKE = 1) Requirements.............. 206

SPIx Slave Mode Requirements (CKE = 0).............. 205

UART ................................................................................ 147

USB On-The-Go (OTG) .................................................... 131

VCAP/VCORE pin ................................................................ 174

Voltage Reference Specifications..................................... 193

Voltage Regulator (On-Chip) ............................................ 174

Watchdog Timer (WDT).................................................... 173

WWW Address ................................................................. 253

WWW, On-Line Support ..................................................... 29

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