MCP4716 datasheet(61/86 Pages) MICROCHIP

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DS22272A-page 61

MCP4706/4716/4726

7.9

Gain Error

The Gain error (see Figure 7-4) is the difference

between the actual full-scale output voltage from the

ideal output voltage of the DAC transfer curve. The

gain error is calculated after nullifying the offset error,

or full scale error minus the offset error.

The gain error indicates how well the slope of the actual

transfer function matches the slope of the ideal transfer

function. The gain error is usually expressed as percent

of full-scale range (% of FSR) or in LSb.

In the MCP4706/4716/4726, the gain error is not

calibrated at the factory and most of the gain error is

contributed by the output buffer (op amp) saturation

near

the

code

range

beyond

4000d.

For

the

applications that need the gain error specification less

than 1% maximum, the user may consider using the

DAC code range between 100d and 4000d instead of

using full code range (code 0 to 4095d). The DAC

output of the code range between 100d and 4000d is

much more linear than full-scale range (0 to 4095d).

The gain error can be calibrated out by software in the

application.

FIGURE 7-4:

Gain Error and Full-Scale

Error Example.

7.10

Gain Error Drift

The Gain error drift is the variation in gain error due to

a change in ambient temperature. The gain error drift is

typically expressed in ppm/oC.

7.11

Offset Error Drift

The Offset error drift is the variation in offset error due

to a change in ambient temperature. The offset error

drift is typically expressed in ppm/oC.

7.12

Settling Time

The Settling time is the time delay required for the VOUT

voltage to settle into its new output value. This time is

measured from the start of code transition, to when the

VOUT voltage is within the specified accuracy.

In the MCP47X6, the settling time is a measure of the

time delay until the VOUT voltage reaches within 0.5

LSb of its final value, when the volatile DAC Register

changes from 400h to C00h.

7.13

Major-Code Transition Glitch

Major-code transition glitch is the impulse energy

injected into the DAC analog output when the code in

the DAC register changes state. It is normally specified

as the area of the glitch in nV-Sec, and is measured

when the digital code is changed by 1 LSb at the major

carry transition (Example: 011...111 to 100...

000

, or 100... 000 to 011 ... 111).

7.14

Digital Feedthrough

The Digital feedthrough is the glitch that appears at the

analog output caused by coupling from the digital input

pins of the device. The area of the glitch is expressed

in nV-Sec, and is measured with a full scale change

(Example: all 0s to all 1s and vice versa) on the digital

input pins. The digital feedthrough is measured when

the DAC is not being written to the output register.

7.15

Power-Supply Rejection Ratio

(PSRR)

PSRR indicates how the output of the DAC is affected

by changes in the supply voltage. PSRR is the ratio of

the change in VOUT to a change in VDD for full-scale

output of the DAC. The VOUT is measured while the

VDD is varied +/- 10%, and expressed in dB or µV/V.

Analog

Output

Actual Transfer Function

DAC Input Code

Gain Error

Ideal Transfer Function

after Offset Error is removed

Full-Scale

Error

Zero-Scale

Error

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