MCP4716 datasheet(34/86 Pages) MICROCHIP

34 / 86 page

MCP4706/4716/4726

DS22272A-page 34

3.1

Analog Output Voltage Pin (VOUT)

VOUT is the DAC analog output pin. The DAC output

has an output amplifier. VOUT can swing from

approximately 0V to approximately VDD. The full-scale

range of the DAC output is from VSS to G * VRL, where

G is the gain selection option (1x or 2x).

In normal mode, the DC impedance of the output pin is

about 1

Ω. In Power-Down mode, the output pin is

internally connected to a known pull-down resistor of

Ω, 125 kΩ, or 640 kΩ. The Power-Down selection

bits settings are shown Table 4-2.

3.2

Positive Power Supply Input (VDD)

VDD is the positive supply voltage input pin. The input

supply voltage is relative to VSS.

The power supply at the VDD pin should be as clean as

possible

for

good

DAC

performance.

recommended to use an appropriate bypass capacitor

of about 0.1 µF (ceramic) to ground. An additional

10 µF

capacitor

(tantalum)

parallel

also

recommended to further attenuate high-frequency

noise present in application boards.

3.3

Ground (VSS)

The VSS pin is the device ground reference.

The user must connect the VSS pin to a ground plane

through a low-impedance connection. If an analog

ground path is available in the application PCB (printed

circuit board), it is highly recommended that the VSS pin

be tied to the analog ground path or isolated within an

analog ground plane of the circuit board.

3.4

Serial Data Pin (SDA)

SDA is the serial data pin of the I2C interface. The SDA

pin is used to write or read the DAC registers and

configuration bits. The SDA pin is an open-drain

N-channel driver. Therefore, it needs a pull-up resistor

from the VDD line to the SDA pin. Except for start and

stop conditions, the data on the SDA pin must be stable

during the high period of the clock. The high or low

state of the SDA pin can only change when the clock

signal on the SCL pin is low. Refer to Section 5.0 “I2C

Serial Interface” for more details of I2C Serial

Interface communication.

3.5

Serial Clock Pin (SCL)

SCL is the serial clock pin of the I2C interface. The

MCP47X6 devices act only as a slave and the SCL pin

accepts only external serial clocks. The input data from

the Master device is shifted into the SDA pin on the

rising edges of the SCL clock and output from the

device occurs at the falling edges of the SCL clock. The

SCL pin is an open-drain N-channel driver. Therefore,

it needs a pull-up resistor from the VDD line to the SCL

pin. Refer to Section 5.0 “I2C Serial Interface” for

more details of I2C Serial Interface communication.

3.6

Voltage Reference Pin (VREF)

This pin is used for the external voltage reference input.

The user can select VDD voltage or the VREF pin

voltage as the reference resistor ladder’s voltage

reference.

When the VREF pin signal is selected, there is an option

for this voltage to be buffered or unbuffered. This is

offered in cases where the reference voltage does not

have the current capability not to drop its voltage when

connected to the internal resistor ladder circuit.

When the VDD is selected as reference voltage, this pin

is disconnected from the internal circuit.

See

Section 4.2

“DAC’s

(Resistor

Ladder)

Reference Voltage” and Table 4-4 for more details on

the configuration bits.

3.7

Exposed Pad (EP)

This pad is conductively connected to the device's

substrate. This pad should be tied to the same potential

as the VSS pin (or left unconnected). This pad could be

used to assist as a heat sink for the device when

connected to a PCB heat sink.

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