MCP4716 datasheet(43/86 Pages) MICROCHIP

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DS22272A-page 43

MCP4706/4716/4726

5.0

I2C SERIAL INTERFACE

The MCP47X6 devices support the I2C serial protocol.

The MCP47X6 I2C’s module operates in Slave mode

(does not generate the serial clock).

5.1

Overview

This I2C interface is a two-wire interface. Figure 5-1

shows a typical I2C Interface connection.

The I2C interface specifies different communication bit

rates. These are referred to as standard, fast or high

speed modes. The MCP47X6 supports these three

modes. The bit rates of these modes are:

• Standard Mode: bit rates up to 100 kbit/s

• Fast Mode: bit rates up to 400 kbit/s

• High Speed Mode (HS mode): bit rates up to

3.4 Mbit/s

A device that sends data onto the bus is defined as

transmitter, and a device receiving data as receiver.

The bus has to be controlled by a master device which

generates the serial clock (SCL), controls the bus

access

and

generates

the

START

and

STOP

conditions. The MCP47X6 device works as slave. Both

master and slave can operate as transmitter or

receiver, but the master device determines which mode

is activated. Communication is initiated by the master

(microcontroller) which sends the START bit, followed

by the slave address byte. The first byte transmitted is

always the slave address byte, which contains the

device code, the address bits, and the R/W bit.

FIGURE 5-1:

Typical I2C Interface.

The I2C serial protocol only defines the field types, field

lengths, timings, etc. of a frame. The frame content

defines the behavior of the device. For details on the

frame content (commands/data) refer to Section 6.0.

Refer to the NXP I2C document for more details on the

I2C specifications.

5.2

Signal Descriptions

The I2C interface uses up to two pins (signals). These

are:

• SDA (Serial Data)

• SCL (Serial Clock)

5.2.1

SERIAL DATA (SDA)

The Serial Data (SDA) signal is the data signal of the

device. The value on this pin is latched on the rising

edge of the SCL signal when the signal is an input.

With the exception of the START and STOP conditions,

the high or low state of the SDA pin can only change

when the clock signal on the SCL pin is low. During the

high period of the clock, the SDA pin’s value (high or

low) must be stable. Changes in the SDA pin’s value

while the SCL pin is HIGH will be interpreted as a

START or a STOP condition.

5.2.2

SERIAL CLOCK (SCL)

The Serial Clock (SCL) signal is the clock signal of the

device. The rising edge of the SCL signal latches the

value on the SDA pin.

The MCP47X6 will not stretch the clock signal (SCL)

since memory read access occurs fast enough.

Depending on the clock rate mode, the interface will

display different characteristics.

SCL

MCP4XXX

SDA

Host

Controller

Typical I2C Interface Connections

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