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ADSP-21469KBZ-ENG2 датащи(PDF) 47 Page - Analog Devices |
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ADSP-21469KBZ-ENG2 датащи(HTML) 47 Page - Analog Devices |
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47 / 56 page ![]() ADSP-21469/ADSP-21469W Preliminary Technical Data Rev. PrB | Page 47 of 56 | November 2008 Universal Asynchronous Receiver-Transmitter (UART) Port—Receive and Transmit Timing Figure 36 describes UART port receive and transmit operations. The maximum baud rate is PCLK/16 where PCLK = 1/tPCLK. As shown in Figure 36 there is some latency between the gener- ation of internal UART interrupts and the external data operations. These latencies are negligible at the data transmis- sion rates for the UART. Table 44. UART Port Parameter Min Max Unit Timing Requirement tRXD 1 Incoming Data Pulse Width TBD TBD ns Switching Characteristic TBD TBD tTXD1 Outgoing Data Pulse Width TBD TBD ns 1 UART signals RXD and TXD are routed through DPI P14-1 pins using the SRU. Figure 36. UART Port—Receive and Transmit Timing DPI_P14 -1 [RXD] DATA(5 -8) INTERNAL UART RECEIVE INTERRUPT UART RECEIVE BIT SET BY DATA STOP; CLEARED BY FIFO READ DPI_P14 -1 [TXD] DATA(5 -8) STOP(1 -2) INTERNAL UART TRANSMIT INTERRUPT UART TRANSMIT BIT SET BY PROGRAM; CLEARED BY WRITE TO TRANSMIT START STOP TRANSMIT RECEIVE tRXD tTXD |
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