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ADSP-21469KBZ-ENG2 датащи(PDF) 25 Page - Analog Devices |
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ADSP-21469KBZ-ENG2 датащи(HTML) 25 Page - Analog Devices |
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25 / 56 page ![]() ADSP-21469/ADSP-21469W Preliminary Technical Data Rev. PrB | Page 25 of 56 | November 2008 Timer WDTH_CAP Timing The following timing specification applies to timer0 and timer1, and in WDTH_CAP (pulse width count and capture) mode. Timer signals are routed to the DPI_P14–1 pins through the SRU. Therefore, the timing specification provided below is valid at the DPI_P14–1 pins. Pin to Pin Direct Routing (DAI and DPI) For direct pin connections only (for example DAI_PB01_I to DAI_PB02_O). Table 20. Timer Width Capture Timing Parameter Min Max Unit Timing Requirement tPWI Timer Pulse Width TBD TBD ns Figure 12. Timer Width Capture Timing DPI_P14-1 (TIMER1-0) tPWI Table 21. DAI Pin to Pin Routing Parameter Min Max Unit Timing Requirement tDPIO Delay DAI/DPI Pin Input Valid to DAI Output Valid TBD TBD ns Figure 13. DAI Pin to Pin Direct Routing DAI_Pn DPI_Pn tDPIO DAI_Pm DPI_Pm |
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