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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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13892 датащи(PDF) 55 Page - Freescale Semiconductor, Inc |
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13892 датащи(HTML) 55 Page - Freescale Semiconductor, Inc |
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55 / 161 page  Analog Integrated Circuit Device Data Freescale Semiconductor 55 13892 FUNCTIONAL DEVICE OPERATION POWER CONTROL SYSTEM POWER CONTROL SYSTEM INTERFACE The power control system on the MC13892 interfaces with the processor via different IO signals and the SPI/I2C bus. It also uses on chip signals and detector outputs. Table 22 gives a listing of the principal elements of this interface. Table 22. Power Control System Interface Signals Name Type of Signal Function PWRON1 Input pin Power on/off 1 button connection PWRON2 Input pin Power on/off 2 button connection PWRON3 Input pin Power on/off 3 button connection PWRONxI/M/S SPI bits PWRONx pin interrupt /mask / sense bits PWRON1DBNC[1:0] SPI bits Sets time for the PWRON1 pin hardware debounce PWRON2DBNC[1:0] SPI bits Sets time for the PWRON2 pin hardware debounce PWRON3DBNC[1:0] SPI bits Sets time for the PWRON3 pin hardware debounce PWRON1RSTEN SPI bit Allows for system reset through the PWRON1 pin PWRON2RSTEN SPI bit Allows for system reset through the PWRON2 pin PWRON3RSTEN SPI bit Allows for system reset through the PWRON3 pin RESTARTEN SPI bit Allows for system restart after a PWRON initiated system reset SYSRSTI/M SPI bits PWRONx System restart interrupt / mask bits WDI Input pin Watchdog input has to be kept high by the processor to keep the MC13892 active WDIRESET SPI bit Allows for system restart through the WDI pin WDIRESETI/M SPI bits WDI System restart interrupt / mask bits RESET Output pin Reset Bar output (active low) to the application. Requires an external pull-up RESETMCU Output pin Reset Bar output (active low) to the processor core. Requires an external pull-up PUMS1 Input pin Switchers and regulators power up sequence and defaults selection 1 PUMS2 Input pin Switchers and regulators power up sequence and defaults selection 2 STANDBY Input pin Signal from primary processor to put the MC13892 in a low power mode STANDBYINV SPI bit Standby signal polarity setting STANDBYSEC Input pin Signal from secondary processor to put the MC13892 in a low power mode STANDBYSECINV SPI bit Secondary standby signal polarity setting STBYDLY[1:0] SPI bits Sets delay before entering standby mode BPON Threshold Threshold validating turn on events BPONI/M/S SPI bits BP turn on threshold interrupt / mask / sense bits LOBATH Threshold Threshold for a low battery warning LOBATHI/M/S SPI bits Low battery warning interrupt / mask / sense bits LOBATL Threshold Threshold for a low battery detect LOBATLI/M/S SPI bits Low battery detect interrupt / mask / sense bits BPSNS [1:0] SPI bits Selects for different settings of LOBATL and LOBATH thresholds UVDET Threshold Threshold for under-voltage detection, will shut down the device LICELL Input pin Connection for Lithium based coin cell CLK32KMCU Output pin Low frequency system clock output for the processor 32.768 kHz CLK32K Output pin Low frequency system clock output for application (peripherals) 32.768 kHz CLK32KMCUEN SPI bit Enables the CLK32KMCU clock output DRM SPI bit Keeps VSRTC and CLK32KMCU active in all states for digital rights management, including off mode PCEN SPI bit Enables power cut support PCI/M SPI bits Power cut detect interrupt / mask bits PCT[7:0] SPI bits Allowed power cut duration PCCOUNTEN SPI bit Enables power cut counter PCCOUNT[3:0] SPI bits Power cut counter PCMAXCNT[3:0] SPI bits Maximum number of allowed power cuts PCUTEXPB SPI bit Indicates a power cut timer counter expired |
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