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13892 датащи(PDF) 53 Page - Freescale Semiconductor, Inc |
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13892 датащи(HTML) 53 Page - Freescale Semiconductor, Inc |
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53 / 161 page ![]() Analog Integrated Circuit Device Data Freescale Semiconductor 53 13892 FUNCTIONAL DEVICE OPERATION CLOCK GENERATION AND REAL TIME CLOCK the 15 bit DAY counter. The DAY counter can count up to 32767 days. The 1.0 Hz time tick can be used to generate a 1HZI interrupt if unmasked. TIME OF DAY ALARM A Time Of Day Alarm (TODA) function can be used to turn on the application and alert the processor. If the application is already on, the processor will be interrupted. The TODA and DAYA registers are used to set the alarm time. Only a single alarm can be programmed at a time. When the TOD counter is equal to the value in TODA, and the DAY counter is equal to the value in DAYA, the TODAI interrupt will be generated. At initial power up of the application (application of the coin cell), the state of the TODA and DAYA registers will be all 1's. The interrupt for the alarm (TODAI) is backed up by LICELL and will be valid at power up. If the mask bit for the TOD alarm (TODAM) is high, then the TODAI interrupt is masked and the application will not turn on with the time of day alarm event (TOD[16:0] = TODA[16:0] and DAY[14:0] = DAYA[14:0]). By default, the TODAM mask bit is set to 1, thus masking the interrupt and turn on event. TIMER RESET As long as the supply at BP is valid, the real time clock will be supplied from VCORE. If not, it can be backed up from a coin cell via the LICELL pin. When the backup voltage drops below RTCUVDET, the RTCPORB reset signal is generated and the contents of the RTC will be reset. Additional registers backed up by coin cell will also reset with RTCPORB. To inform the processor that the contents of the RTC are no longer valid due to the reset, a timer reset interrupt function is implemented with the RTCRSTI bit. RTC TIMER CALIBRATION A clock calibration system is provided to adjust the 32,768 cycle counter that generates the 1.0 Hz timer for RTC timing registers to comply with digital rights management specifications of ±50 ppm. This calibration system can be disabled, if not needed to reduce the RTC current drain. The general implementation relies on the system processor to measure the 32.768 kHz crystal oscillator against a higher frequency and more accurate system clock such as a TCXO. If the RTC timer needs a correction, a 5 bit 2's complement calibration word can be sent via the SPI to compensate the RTC for inaccuracy in its reference oscillator as defined in Table 18. Note that the 32.768 kHz oscillator is not affected by RTCCAL settings. Calibration is only applied to the RTC time base counter. Therefore, the frequency at the clock outputs CLK32K and CLK32KMCU are not affected. The RTC system calibration is enabled by programming the RTCCALMODE[1:0] for desired behavior by operational mode. A slight increase in consumption will be seen when the calibration circuitry is activated. To minimize consumption and maximize lifetime when the RTC system is maintained by the coin cell, the RTC Calibration circuitry can be automatically disabled Table 18. RTC Calibration Settings Code in RTCCAL[4:0] Correction in Counts per 32768 Relative correction in ppm 01111 +15 +458 00011 +3 +92 00001 +1 +31 00000 0 0 11111 -1 -31 11101 -3 -92 10001 -15 -458 10000 -16 -488 Table 19. RTC Calibration Enabling RTCCALMODE Function 00 RTC Calibration disabled (default) 01 RTC Calibration enabled in all modes except coin cell only 10 Reserved for future use. Do not use. 11 RTC Calibration enabled in all modes |
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