CDCE706 datasheet(30/40 Pages) TI

номер детали	CDCE706

подробное описание детали	PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER/MULTIPLIER/DIVIDER

PDF	40 Pages

Scroll/Zoom	100%

производитель	TI [Texas Instruments]

домашняя страница	http://www.ti.com

Logo

30 / 40 page

Buffer

Sel

P-Div(0)Output

P-Div(1)Output

P-Div(2)Output

P-Div(3)Output

P-Div(4)Output

P-Div(5)Output

P-DividerSelect

InversionSelect

Slew-RateControl

LowSelect

Enable/Disable

(Optional; All

OutputsLow

or3-State)

CCOUT1

CCOUT2

B0338-01

Divby3

Inverting

SlewRate

LowSelect

Enable/Disable

Clock

T0410-01

CDCE706

SCAS815I – OCTOBER 2005 – REVISED NOVEMBER 2008 ........................................................................................................................................... www.ti.com

Figure 24. Block Diagram of Output Architecture

Figure 25. Example for Output Waveforms

All output settings are programmable via SMBus:

• Enable, disable, low-state via external control pins S0 and S1 → byte 10, bits[3:0]

• Enable or disable-to-low → bytes 19 to 24, bit[3]

• Inverting/noninverting → bytes 19 to 24, bit[6]

• Slew-rate control → bytes 19 to 24, bits[5:4]

• Output swing → external pins V

CCOUT1 (pin 14) and VCCOUT2 (pin 18)

Submit Documentation Feedback

Product Folder Link(s): CDCE706

CDCE706 датащи(PDF) 30 Page - Texas Instruments

CDCE706 датащи(HTML) 30 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

датащи скачать

ссылки URL