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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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DM9102DEP датащи(PDF) 17 Page - Davicom Semiconductor, Inc. |
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DM9102DEP датащи(HTML) 17 Page - Davicom Semiconductor, Inc. |
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17 / 70 page  Final 17 Version: DM9102D-DS-F01 May 10, 2006 6.1.8 Expansion ROM Base Address (xxxxxx30 - PCIROM) 31 0 1 ROM Base Address R/W 10 Reserved 18 17 0000000 ROM Base Address 9 00000000 Bit Default Type Description 31:10 00H RW ROM Base Address With 256K Boundary PCIROM bit17~10 are hardwired to 0, indicating ROM Size is up to 256K Size 9:1 000000000 RO Reserved Bits Read As 0 0 0 RW Expansion ROM Decoder Enable/Disable If this bit and the memory space access bit are both set to 1, the DM9102D will respond to its expansion ROM 6.1.9 Capabilities Pointer (xxxxxx34H - Cap _Ptr) 31 0 7 8 Reserved 0 Capability Pointer 10 10 0 0 0 Bit Default Type Description 31:8 000000H RO Reserved 7:0 01010000 RO Capability Pointer The Cap_ Ptr provides an offset (default is 50H) into the function’s PCI Configuration Space for the location of the first term in the Capabilities Linked List. The Cap_ Ptr offset is double word aligned so the two least significant bits are always “0”s |
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