| поискавой системы для электроныых деталей |
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DM9102DEP датащи(PDF) 66 Page - Davicom Semiconductor, Inc. |
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DM9102DEP датащи(HTML) 66 Page - Davicom Semiconductor, Inc. |
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66 / 70 page ![]() 66 Final Version: DM9102D-DS-F01 May 10, 2006 9.6 Power Plane Partitioning • The power planes are approximately illustrated in Figure 9-4. The ferrite bead used should have an impedance 100Ω at 100MHz and 250mA above. A suitable bead is the Panasonic surface mound bead, part number EXCCL4532U or an equivalent. 10 μ F, 0.1 μ F and 0.01 μ F electrolytic bypass capacitors should be connected between VDD and GND at each side of the ferrite bead. • Separate analog power planes from noisy logic power planes. Figure 9-5 |
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